ICS85408BGLF IDT, Integrated Device Technology Inc, ICS85408BGLF Datasheet - Page 12

• Manufacturer Part Number: ICS85408BGLF
• Description: IC CLK DISTR DIFF-LVDS 24-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS85408BGLF

• Number Of Circuits: 1
• Ratio - Input:output: 1:8
• Differential - Input:output: Yes/Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVDS
• Frequency - Max: 700MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Frequency-max: 700MHz
• Number Of Outputs: 16
• Operating Supply Voltage (max): 3.465V
• Operating Temp Range: 0C to 70C
• Propagation Delay Time: 5ns
• Operating Supply Voltage (min): 3.135V
• Mounting: Surface Mount
• Pin Count: 24
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSSOP
• Duty Cycle: 55%
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1182; 800-1182-5; 800-1182; 85408BGLF

ICS85408 Datasheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS85408.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS85408 is the sum of the core power plus the analog power plus the power dissipated in the load(s). The
following is the power dissipation for V
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The
maximum recommended junction temperature for HiPerClockS devices is 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
a multi-layer board, the appropriate value is 70°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
ICS85408BG REVISION B JUNE 25, 2009
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
•
70°C + 0.312W * 70°C/W = 91.8°C. This is well below the limit of 125°C.
Power (core)
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
= V
DD_MAX
θ
JA
* I
DD
for 24 Lead TSSOP, Forced Convection
DD_MAX
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 90mA = 311.85mW
* Pd_total + T
θ
JA
A
by Velocity
70°C/W
0
12
LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
65.0°C/W
JA
1
must be used. Assuming no air flow and
©2009 Integrated Device Technology, Inc.
62°C/W
2.5