ICS950812CGLFT IDT, Integrated Device Technology Inc, ICS950812CGLFT Datasheet

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ICS950812CGLFT

Manufacturer Part Number
ICS950812CGLFT
Description
IC FREQ GEN 200MHZ CLK 56-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS950812CGLFT

Input
Crystal
Output
Clock
Frequency - Max
200MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
950812CGLFT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS950812CGLFT
Manufacturer:
IDT
Quantity:
1 000
Part Number:
ICS950812CGLFT
Manufacturer:
IDT
Quantity:
20 000
Frequency Generator with 200MHz Differential
CPU Clocks
Recommended Application:
CK-408 clock with Buffered/Unbuffered mode supporting
Almador, Brookdale, ODEM, and Montara-G chipsets with PIII/
P4 processor. Programmable for group to group skew.
Output Features:
Features:
Key Specifications:
Block Diagram
IDT
CPU_STOP#
PCI_STOP#
MULTSEL
TM
FS (5:0)
SDATA
3 0.7V Differential CPU Clock Pairs
7 PCI (3.3V) @ 33.3MHz including 2 early PCI clocks
3 PCI_F (3.3V) @ 33.3MHz
1 USB (3.3V) @ 48MHz, 1 DOT (3.3V) @ 48MHz
1 REF (3.3V) @ 14.318MHz
5 3V66 (3.3V) @ 66.6MHz
1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz
3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN or 66.6MHz
Provides standard frequencies and additional 5%
and 10% over-clocked frequencies
Supports spread spectrum modulation:
No spread, Center Spread (±0.35%, ±0.5%,
or ±0.75%), or Down Spread (-0.5%, -1.0%, or -1.5%)
Offers adjustable PCI early clock via latch inputs
Selectable 1X or 2X strength for REF via I
Efficient power management scheme through PD#,
CPU_STOP# and PCI_STOP#.
Uses external 14.318MHz crystal
Stop clocks and functional control available through
I
CPU Output Jitter <150ps
3V66 Output Jitter <250ps
66MHz Output Jitter (Additive) (Buffered Mode) <100ps
CPU Output Skew <100ps
SCLK
2
Frequency Generator with 200MHz Differential CPU Clocks
PD#
C interface.
X2
X1
Spectrum
Spread
Control
Config.
XTAL
PLL1
Logic
OSC
Reg.
PLL2
DIVDER
DIVDER
DIVDER
CPU
3V66
PCI
Stop
Stop
3
2
3
3
7
E_PCICLK(1,3)/PCICLK(1,3)
PCICLK_F (2:0)
3V66_0
I REF
48MHz_USB
PCICLK (6:4, 2, 0)
3V66_1/VCH_CLK
48MHz_DOT
3V66_5/66MHz_IN
3V66_3/66MHz_OUT1
3V66_(4,2)/66MHz_OUT(2,0)
REF
CPUCLKT (2:0)
CPUCLKC (2:0)
2
C interface
1
*
**
These inputs have 120K internal pull-up resistors to VDD.
Internal pull-down resistors to ground.
Pin Configuration
Frequency Select
FS2 FS1 FS0
**E_PCICLK1/PCICLK1 11
**E_PCICLK3/PCICLK3 13
0
0
0
0
1
1
1
1
66MHZ_OUT0/3V66_2 21
66MHZ_OUT1/3V66_3 22
66MHZ_OUT2/3V66_4 23
Note:
Almador board level designs MUST use pin 22,
66MHZ_OUT1, as the feedback connection from the clock
buffer path to the Almador (GMCH) chipset.
66MHZ_IN/3V66_5 24
Bit
0
0
1
1
0
0
1
1
Vtt_PWRGD# 28
0
1
0
1
0
1
0
1
PCICLK_F0
PCICLK_F1
PCICLK_F2
VDD3V66 19
VDDREF
PCICLK0 10
PCICLK2 12
PCICLK4 16
PCICLK5 17
PCICLK6 18
6.10 mm. Body, 0.50 mm. pitch TSSOP
CPUCLK
VDDPCI
VDDPCI 14
100.00
200.00
133.33
100.00
200.00
133.33
66.66
66.66
VDDA 26
MHz
GND
GND
GND 15
GND 20
*PD# 25
GND 27
X1
X2
66.66
66.66
66.66
66.66
66.66
66.66
66.66
66.66
3V66
1
2
3
4
5
6
7
8
9
56-Pin 300mil SSOP
MHz
66MHz_OU
3V66 (4:2)
66MHz_IN
66MHz_IN
66MHz_IN
66MHz_IN
T (2:0)
66.66
66.66
66.66
66.66
MHz
66MHz_IN
ICS950812
3V66_5
66.66
66.66
66.66
66.66
Input
Input
Input
Input
MHz
56 REF
55 FS1
54 FS0
53 CPU_STOP#*
52 CPUCLKT0
51 CPUCLKC0
50 VDDCPU
49 CPUCLKT1
48 CPUCLKC1
47 GND
46 VDDCPU
45 CPUCLKT2
44 CPUCLKC2
43 MULTSEL*
42 IREF
41 GND
40 FS2
39 48MHz_USB/FS3
38 48MHz_DOT
37 VDD48
36 GND
35 3V66_1/VCH_CLK/FS4
34 PCI_STOP#*
33 3V66_0/FS5
32 VDD3V66
31 GND
30 SCLK
29 SDATA
DATASHEET
0542J—01/25/10
66MHz_IN/2
66MHz_IN/2
66MHz_IN/2
66MHz_IN/2
PCICLK_F
PCICLK
33.33
33.33
33.33
33.33
MHz
**
**
**

Related parts for ICS950812CGLFT

ICS950812CGLFT Summary of contents

Page 1

Frequency Generator with 200MHz Differential CPU Clocks Recommended Application: CK-408 clock with Buffered/Unbuffered mode supporting Almador, Brookdale, ODEM, and Montara-G chipsets with PIII/ P4 processor. Programmable for group to group skew. Output Features: • 3 0.7V Differential CPU Clock Pairs ...

Page 2

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Pin Description PIN # PIN NAME PIN TYPE 1 VDDREF GND 5 PCICLK_F0 6 PCICLK_F1 7 PCICLK_F2 8 VDDPCI 9 GND 10 PCICLK0 11 **E_PCICLK1/PCICLK1 12 PCICLK2 ...

Page 3

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Pin Description (continued) PIN # PIN NAME PIN TYPE 29 SDATA 30 SCLK 31 GND 32 VDD3V66 33 3V66_0/FS5** 34 PCI_STOP#* 35 3V66_1/VCH_CLK/FS4** 36 GND 37 VDD48 38 48MHz_DOT 39 48MHz_USB/FS3** 40 ...

Page 4

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Frequency Select Table 1 Freq Sel CPU MHz 3V66 MHz FS(5: 66.66 66. 100.00 66.66 From 200.00 ...

Page 5

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Maximum Allowed Current Max 3.3V supply consumption Max discrete cap loads, Condition Vdd = 3.465V All static inputs = Vdd or GND Powerdown Mode (PD Active Full 280mA Host Swing ...

Page 6

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Table 3 2 PCI_STOP Control Table-Byte 0, Bit 3 PCI_STOP# Byte 0 Bit 3 (Pin 34) Write Bit Note: When this Byte ...

Page 7

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Table 7 2 3V66 (0: Control Table CPU_STOP# Byte 5 (Pin 53) Bit Note: Activating Byte 5, Bit 4 will allow ...

Page 8

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Absolute Maximum Ratings Supply Voltage Logic Inputs Ambient Operating Temperature Case Temperature Storage Temperature Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are ...

Page 9

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Electrical Characteristics - CPU (1V Select) 100MHz 90°C; VDD=3.3V +/-5 PARAMETER SYMBOL Current Source Output Zo Impedance Average Period T PERIOD Output High Voltage V Output ...

Page 10

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Electrical Characteristics - CPU (0.7V Select) 133.33MHz 90°C; VDD=3.3V +/-5%; (unless otherwise specified) A PARAMETER SYMBOL Current Source Output 1 Zo Impedance Average Period T PERIOD Voltage High ...

Page 11

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Electrical Characteristics - PCICLK Un-Buffered Mode 90°C; VDD=3.3V +/-5 PARAMETER SYMBOL Output Impedance R DSP1 Average Period T PERIOD Output High Voltage V Output Low Voltage ...

Page 12

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Electrical Characteristics - 3V66 -Un-Buffered Mode: 3V66 [5: 90°C; VDD=3.3V +/-5 PARAMETER SYMBOL Output Impedance R DSP1 Average Period T PERIOD Output High Voltage V OH ...

Page 13

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Electrical Characteristics - REF (1X select 90°C; VDD=3.3V +/-5 PARAMETER SYMBOL F Output Frequency Output Impedance R DSP1 Output High Voltage V Output Low Voltage V ...

Page 14

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Figure 1 - Differential (CPUCLK - CPUCLK#) Measurement Points (Tperiod, Duty Cycle, Jitter) Figure 1 - Differential (CPUCLK - CPUCLK#) Measurement Points (Tperiod, Duty Cycle, Jitter) 0.000 V Figure 2 - 0.7V ...

Page 15

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Figure 3 - 0.7V Single Ended Measurement Points for TRise, TFall V = 0.525 OH V CROSS V = 0.175V OL V CROSS(REL) V CROSS(REL) TM IDT Frequency Generator with 200MHz Differential ...

Page 16

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Figure 5 - 1.0V Single Ended VCross, VOH and VOL Measurement Points V Max 1.45V OH CPUCLK# V Min 0.92V OH V Max 0.76V CROSS V Min 0.51V CROSS V Max 0.35V ...

Page 17

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Figure 7 - Measurement Points for TRise, TFall with Lumped Load 2.4V 1.5V 0.4V Figure 8 - Measurement Points for TPeriod, Duty Cycle and Jitter 1.5V TM IDT Frequency Generator with 200MHz ...

Page 18

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks General SMBus serial interface information for the ICS950812 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • ...

Page 19

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks BYTE Affected Pin 0 Pin # Name Bit 7 - Spread Enabled Bit 6 - CPUCLKT(2:0) Bit 5 35 3V66_1/VCH_CLK/FS4** Bit 4 53 CPU_STOP#* Bit 3 34 PCI_STOP#* Bit 2 39 FS3 ...

Page 20

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks BYTE Affected Pin 4 Pin # Name Bit 7 35 FS4 Bit 6 33 FS5 Bit 5 33 3V66_0/FS5** Bit 4 35 3V66_1/VCH_CLK/FS4** Bit 3 24 66MHZ_IN/3V66_5 Bit 2 23 66MHZ_OUT2/3V66_4 Bit ...

Page 21

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks BYTE Affected Pin 9 Pin # Name Bit 7 35 VCHCLK Slew Control Bit 6 Bit PCICLK_F (2:0) Slew Contol Bit 4 Bit 3 13, 12, PCICLK (3:0) ...

Page 22

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks BYTE Affected Pin 13 Pin # Name Bit Bit Bit Bit Bit Bit Bit ...

Page 23

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Buffered Mode - 3V66[0:1], 66MHz_IN, 66MHz_OUT[0:2] and PCI Phase Relationship All 3V66 clocks are phase with each other. All 66MHz_OUT clocks are phase with each other. ...

Page 24

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks All 3V66 clocks are pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there is no defined phase relationship between 3V66_1_VCH and other ...

Page 25

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks PCI_STOP# - Assertion (transition from logic "1" to logic "0") The impact of asserting the PCI_STOP# signal will be the following. All PCI[6:0] and stoppable PCI_F[2,0] clocks will latch low in their ...

Page 26

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks CPU_STOP# - De-assertion (transition from logic "0" to logic "1") All CPU outputs that were stopped are to resume normal operation in a glitch free manner. The maximum latency from the de- ...

Page 27

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Power Down De-Assertion Mode The power-up latency needs to be less than 1.8mS. this is the time from the de-asseration of the powerdown of the ramping of the power supply until the ...

Page 28

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks INDEX INDEX AREA AREA 45° 45° 300 mil SSOP Package Ordering Information 950812yFLFT Example: XXXX y ...

Page 29

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks N E1 INDEX INDEX AREA AREA 6.10 mm. Body, 0.50 mm. pitch TSSOP (20 mil) (240 mil) Ordering Information 950812yGLFT Example: XXXX y ...

Page 30

ICS950812 Frequency Generator with 200MHz Differential CPU Clocks Revision History Rev. Issue Date Description 1. Moved SMBus after page 22. 2. Corrected 3V66 Buffered mode on Electrical Characteristics Table. 3. Added DC Characteristics to REF2X Electrical Characteristics Table. I 8/4/2005 ...

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