ICS950812CGLFT IDT, Integrated Device Technology Inc, ICS950812CGLFT Datasheet - Page 19

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ICS950812CGLFT

Manufacturer Part Number
ICS950812CGLFT
Description
IC FREQ GEN 200MHZ CLK 56-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS950812CGLFT

Input
Crystal
Output
Clock
Frequency - Max
200MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
950812CGLFT

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS950812CGLFT
Manufacturer:
IDT
Quantity:
1 000
Part Number:
ICS950812CGLFT
Manufacturer:
IDT
Quantity:
20 000
IDT
BYTE
BYTE
BYTE
BYTE
ICS950812
Frequency Generator with 200MHz Differential CPU Clocks
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TM
0
1
2
3
Note: For PCI_STOP# function, refer to table 3.
Note:
Note:
Note: PCICLK_F(2:0) can be turned on/off by PCI_STOP#. Refer to table 5.
Frequency Generator with 200MHz Differential CPU Clocks
CPUCLK(2:0) can be turned on/off by CPU_STOP#. Refer to table 4.
PCICLK(6:0) can be turned on/off by PCI_STOP#. Refer to table 3.
45, 44
49, 48
52, 51
45, 44
49, 48
52, 51
Pin #
Pin #
Pin #
Pin #
35
53
34
39
55
54
43
56
18
17
16
13
12
11
10
38
39
7
6
5
7
6
5
-
-
-
3V66_1/VCH_CLK/FS4**
CPUCLKT2, CPUCLKC2
CPUCLKT1, CPUCLKC1
CPUCLKT0, CPUCLKC0
CPUCLKT2, CPUCLKC2
CPUCLKT1, CPUCLKC1
CPUCLKT0, CPUCLKC0
**E_PCICLK3/PCICLK3
**E_PCICLK1/PCICLK1
PCICLK_F2 (see note)
PCICLK_F1 (see note)
PCICLK_F0 (see note)
Affected Pin
Affected Pin
Affected Pin
Affected Pin
48MHz_USB/FS3**
Spread Enabled
CPUCLKT(2:0)
CPUCLKT(2:0)
CPU_STOP#*
48MHz_DOT
PCI_STOP#*
PCICLK_F2
PCICLK_F1
PCICLK_F0
MULTSEL*
(see note)
(see note)
(see note)
PCICLK6
PCICLK5
PCICLK4
PCICLK2
PCICLK0
Name
Name
Name
Name
REF
FS3
FS1
FS0
Reflects value of pin at power up.
Power down mode output level
0= CPU driven in power down
0= CPU driven when stopped
CPU_Stop mode output level
Allow control of output with
assertion of CPU_STOP#.
Allow control of output with
assertion of CPU_STOP#.
Allow control of output with
assertion of CPU_STOP#.
Allow control of output with
Allow control of output with
Allow control of output with
Spread Spectrum Control
1X or 2X Strength control
assertion of PCI_STOP#.
assertion of PCI_STOP#.
assertion of PCI_STOP#.
Frequency Selection
Frequency Selection
Frequency Selection
Reflects value of pin
Reflects value of pin
VCH/66.66 Select
Control Function
Control Function
Control Function
Control Function
Also can be set.
Output control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
1 = undriven
1= undriven
19
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
Freerun
Freerun
Freerun
Freerun
Freerun
Freerun
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
HIGH
66.66
HIGH
OFF
Stop
Stop
Not
Not
Not
1X
0
0
0
0
-
-
-
-
Bit Control
Bit Control
Bit Control
Bit Control
Freerun
Freerun
Freerun
Freerun
Freerun
Freerun
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Active
Active
48.00
LOW
LOW
ON
Not
Not
Not
2X
1
1
1
1
-
-
-
-
PWD
PWD
PWD
PWD
X
X
X
X
X
0
0
0
x
0
0
0
0
1
1
1
0
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
0542J—01/25/10

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