ICS950812CGLFT IDT, Integrated Device Technology Inc, ICS950812CGLFT Datasheet - Page 2

• Manufacturer Part Number: ICS950812CGLFT
• Description: IC FREQ GEN 200MHZ CLK 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS950812CGLFT

• Input: Crystal
• Output: Clock
• Frequency - Max: 200MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 950812CGLFT

Pin Description
IDT
PIN # PIN NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
ICS950812
Frequency Generator with 200MHz Differential CPU Clocks
TM
Frequency Generator with 200MHz Differential CPU Clocks
VDDREF
X1
X2
GND
PCICLK_F0
PCICLK_F1
PCICLK_F2
VDDPCI
GND
PCICLK0
**E_PCICLK1/PCICLK1
PCICLK2
**E_PCICLK3/PCICLK3
VDDPCI
GND
PCICLK4
PCICLK5
PCICLK6
VDD3V66
GND
66MHZ_OUT0/3V66_2
66MHZ_OUT1/3V66_3
66MHZ_OUT2/3V66_4
66MHZ_IN/3V66_5
*PD#
VDDA
GND
Vtt_PWRGD#
PIN TYPE
PWR
OUT
PWR
OUT
OUT
OUT
PWR
PWR
OUT
OUT
PWR
PWR
OUT
OUT
OUT
PWR
PWR
OUT
OUT
OUT
PWR
PWR
I/O
I/O
I/O
IN
IN
IN
DESCRIPTION
Ref, XTAL power supply, nominal 3.3V
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
Early/Normal PCI clock output latched at power up.
PCI clock output.
Early/Normal PCI clock output latched at power up.
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
PCI clock output.
Power pin for the 3V66 clocks.
Ground pin.
3.3V 66.66MHz clock output selected via buffered or internal VCO.
3.3V 66.66MHz clock output selected via buffered or internal VCO.
3.3V 66.66MHz clock output selected via buffered or internal VCO.
3.3V 66.66MHz clock from internal VCO, 66MHZ input to 66MHz output and
PCI.
Asynchronous active low input pin used to power down the device into a low
power state. The internal clocks are disabled and the VCO and the crystal
are stopped. The latency of the power down will not be greater than 1.8ms.
3.3V power for the PLL core.
Ground pin.
This 3.3V LVTTL input is a level sensitive strobe used to determine when
latch inputs are valid and are ready to be sampled. This is an active low
input.
2
0542J—01/25/10