LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 72

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 3.9
3-20
Name
D1, SEL_1
D2, SEL_2
D3, SEL_3
ENCL_ACK/,
SEL_4
DSK_RD/,
SEL_5
Pin Assignments for SFF-8067 Mode (Cont.)
Pin/Ball
136/A8
135/B8
134/C8
132/D8
131/A9
No.
Signal Descriptions
Description
When PARALLEL_ESI/ is asserted,
this signal contains bit 1 of a data
nibble for read and write operations.
When PARALLEL_ESI/ is
deasserted, this signal is the SEL_1
signal, included for compatibility with
SFF-8045.
When PARALLEL_ESI/ is asserted,
this signal contains bit 2 of a data
nibble for read and write operations.
When PARALLEL_ESI/ is
deasserted, this signal is the SEL_2
signal, included for compatibility with
SFF-8045.
When PARALLEL_ESI/ is asserted,
this signal contains bit 3 of a data
nibble for read and write operations.
When PARALLEL_ESI/ is
deasserted, this signal is the SEL_3
signal, included for compatibility with
SFF-8045.
When PARALLEL_ESI/ is asserted,
this is an active low acknowledge
signal sourced by the LSI53C040
back to the Fibre Channel device.
When PARALLEL_ESI/ is
deasserted, this signal is the SEL_4
signal, included for compatibility with
SFF-8045.
When PARALLEL_ESI/ is asserted,
this is an active low control signal
sourced by the drive to the
LSI53C040 to indicate the device is
ready to read data. When
PARALLEL_ESI/ is deasserted, this
signal is the SEL_5 signal, included
for compatibility with SFF-8045.
8067 Port
Port 1
Port 1
Port 1
Port 1
Port 1
Pad
Configuration
4 mA open drain
bidirectional
4 mA open drain
bidirectional
4 mA open drain
bidirectional
4 mA open drain
bidirectional
4 mA open drain
bidirectional