LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 201

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

interrupts (Cont.)
IOD bit
IRA bit
ISR register
ITF0 control bit
ITF0 SCL input bit
ITF0 SCL output bit
ITF0 SDA input bit
ITF0 SDA output bit
ITF1 control bit
ITF1 SCL input bit
ITF1 SCL output bit
ITF1 SDA input bit
ITF1 SDA output bit
J
JTAG signal pins
JTAG support
jump instruction
L
LA bit
LAB bit
last byte sent bit
last received bit/address 0 bit
LBR register
LBS bit
LED blink rate register
LESI0–LESI1 registers
live ESI registers
lost arbitration bit 4-4,
LRB/AD0 bit
LSI53C040
LVD bit
LVD mode
LVD_PWRDWN bit
LVDlink technology
M
manual data output registers
maximum ratings
MB bit
MCR register
MDATA0–MDATA1 registers
message bit
microcontroller core
miscellaneous control register
miscellaneous register
miscellaneous signal pins
polling and hardware interrupts
register bits used
SCSI 2-27,
SCSI bus reset
SFF-8067
two-wire serial
advantages
features summary
introduction
automatic branch generation
interrupts
overview
timings
4-4
4-6
4-11
4-14
6-8
4-8
8-8
2-8
9-13
7-7
4-9
6-8
8-6
2-3
2-27
7-6
2-31
2-34
2-29
6-10
6-9
1-1
1-1
2-21
4-8
5-5
9-2
3-16
2-31
6-10
6-9
6-10
6-9
2-30
7-6
2-8
6-10
6-9
6-10
6-9
2-28
1-4
6-8
6-9
8-6
5-5
3-9
Index
5-6
5-6
6-8
7-6
2-21
2-32
MLI0H register
MLI0L register
MLI1H register
MLI1L register
MLI2H register
MLI2L register
MLL0H register
MLL0L register
MLL1H register
MLL1L register
MLL2H register
MLL2L register
MLLM0H register
MLLM0L register
MLLM1H register
MLLM1L register
MLLM2H register
MLLM2L register
MLO0H register
MLO0L register
MLO1H register
MLO1L register
MLO2H register
MLO2L register
mode register
monitor busy bit
MPE0 register
MPE1 register
MPE2 register
MPE3 register
MPI0 register
MPI1 register
MPI2 register
MPI3 register
MPIO3_[1:0] 2-27, 2-28,
MPIO3_0 interrupt or 8067 port 0 interrupt bit 7-8, 7-14,
MPIO3_1 interrupt or 8067 port 1 interrupt bit 7-8, 7-14,
MPL0 register
MPL1 register
MPL2 register
MPL3 register
MPLM0 register
MPLM1 register
MPLM2 register
MPLM3 register
MPO0 register
MPO1 register
MPO2 register
MPO3 register
MPPE0 register
MPPE1 register
MPPE2 register
MPPE3 register
MSG/ bit
multipurpose I/O bank 0
multipurpose I/O bank 1
enable register
input register
latch mask register
latch register
output register
pull-down enable register
enable register
input register
latch mask register
latch register
4-9
8-9
8-12
8-15
8-19
4-6
8-10
8-13
8-16
8-20
8-9
8-12
8-15
8-18
8-22
8-27
8-31
8-8
8-11
8-14
8-17
8-23
8-27
8-32
8-24
8-29
8-33
8-25
8-29
8-34
8-21
8-25
8-30
8-11
8-14
8-17
8-20
8-22
8-26
8-31
8-10
8-13
8-16
8-19
4-6
8-10
8-13
8-23
8-28
8-32
8-9
8-12
8-24
8-28
8-33
8-8
8-9
8-12
8-10
8-13
2-34
8-11
7-15
7-15
IX-3