LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 106

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

6-6
STO
ACK
Register: 0xFD01/0xFD03
Control Register Reads (ES0 = 0)
Read Only
PIN
ES0
ES[1:2]
Two-Wire Serial Registers
PIN
7
0
ES0
6
0
100] - Data Register) will be sent out on the Two-Wire
Serial bus with a start condition as defined in the
Inter-Integrated Circuit specification.
Stop
When set, this bit signifies that a stop condition (as
described in the Inter-Integrated Circuit specification) will
be sent out onto the interface.
Acknowledge
When set, this bit will enable an ACK to be transmitted
during the ninth clock cycle of the transfer after receiving
a data byte.
Pending Interrupt
Setting this bit clears the interrupt and all of the status
bits.
Enable Serial Output
This bit enables the Two-Wire Serial bus I/O. When low
(0), register access is available for initialization. If high
(1), then the serial shift register S0 and status register S1
are accessible.
Register Selection Bits
These bits select the Two-Wire Serial register that is
read/written by accessing the Two-Wire Serial interface 0
register location.
ES0
0
0
1
5
0
ES1
ES[1:2]
0
1
0
ES2
4
0
0
0
0
Description
R/W Own Register
R/W Clock Register
R/W Data Register
ENI
3
0
STA
2
0
STO
1
0
ACK
0
0
[5:4]
1
0
7
6