MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 41

• Manufacturer Part Number: MC68HC908QT2CPE
• Manufacturer: Freescale

Specifications of MC68HC908QT2CPE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 6
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 4-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Program Memory Type: Flash
• Program Memory Size: 1.5KB
• Lead Free Status / RoHS Status: Compliant

Chapter 3
Analog-to-Digital Converter (ADC)
3.1 Introduction
This section describes the analog-to-digital converter (ADC). The ADC is an 8-bit, 4-channel analog-to-
digital converter. The ADC module is only available on the MC68HC908QY2, MC68HC908QT2,
MC68HC908QY4, and MC68HC908QT4.
3.2 Features
Features of the ADC module include:
3.3 Functional Description
Four ADC channels are available for sampling external sources at pins PTA0, PTA1, PTA4, and PTA5.
An analog multiplexer allows the single ADC converter to select one of the four ADC channels as an ADC
voltage input (ADCVIN). ADCVIN is converted by the successive approximation register-based counters.
The ADC resolution is eight bits. When the conversion is completed, ADC puts the result in the ADC data
register and sets a flag or generates an interrupt.
Figure 3-2
3.3.1 ADC Port I/O Pins
PTA0, PTA1, PTA4, and PTA5 are general-purpose I/O pins that are shared with the ADC channels. The
channel select bits (ADC status and control register (ADSCR), $003C), define which ADC channel/port
pin will be used as the input signal. The ADC overrides the port I/O logic by forcing that pin as input to the
ADC. The remaining ADC channels/port pins are controlled by the port I/O logic and can be used as
general-purpose I/O. Writes to the port register or data direction register (DDR) will not have any affect
on the port pin that is selected by the ADC. Read of a port pin which is in use by the ADC will return a 0
if the corresponding DDR bit is at 0. If the DDR bit is at 1, the value in the port data latch is read.
Freescale Semiconductor
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4 channels with multiplexed input
Linear successive approximation with monotonicity
8-bit resolution
Single or continuous conversion
Conversion complete flag or conversion complete interrupt
Selectable ADC clock frequency
shows a block diagram of the ADC.
MC68HC908QY/QT Family Data Sheet, Rev. 6
41