MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 271

• Manufacturer Part Number: MC9S12XDT512CAA
• Manufacturer: Freescale

Specifications of MC9S12XDT512CAA

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 59
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

ROL
Operation
n = RS or IMM4
Rotates the bits in register RD n positions to the left. The lower n bits of the register RD are filled with the
upper n bits. Two source forms are available. In the first form, the parameter n is contained in the
instruction code as an immediate operand. In the second form, the parameter is contained in the lower bits
of the source register RS[3:0]. All other bits in RS are ignored. If n is zero, no shift will take place and the
register RD will be unaffected; however, the condition code flags will be updated.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
ROL RD, #IMM4
ROL RD, RS
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
0; cleared.
Not affected.
Z
V
0
Source Form
—
C
Address
MC9S12XDP512 Data Sheet, Rev. 2.21
Mode
IMM4
DYA
Rotate Left
0
0
0
0
n bits
RD
0
0
0
0
1
1
Machine Code
RD
RD
RS
IMM4
Chapter 6 XGATE (S12XGATEV2)
1
1
0
1
1
ROL
1
1
0
0
Cycles
P
P
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