MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 1179

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MC9S12XDT512CAA

Manufacturer Part Number
MC9S12XDT512CAA
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDT512CAA

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
59
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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28.4.2.5
The mass erase operation will erase all addresses in a Flash block using an embedded algorithm.
An example flow to execute the mass erase operation is shown in
write sequence is as follows:
If a Flash block to be erased contains any protected area, the PVIOL flag in the FSTAT register will set and
the mass erase command will not launch. Once the mass erase command has successfully launched, the
CCIF flag in the FSTAT register will set after the mass erase operation has completed unless a new
command write sequence has been buffered.
Freescale Semiconductor
1. Write to a Flash block address to start the command write sequence for the mass erase command.
2. Write the mass erase command, 0x41, to the FCMD register.
3. Clear the CBEIF flag in the FSTAT register by writing a 1 to CBEIF to launch the mass erase
The address and data written will be ignored. Multiple Flash blocks can be simultaneously mass
erased by writing to the same relative address in each Flash block.
command.
Mass Erase Command
MC9S12XDP512 Data Sheet, Rev. 2.21
Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)
Figure
28-30. The mass erase command
1181

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