LSISAS1068 LSI, LSISAS1068 Datasheet - Page 69

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

Power-On Sense Pins Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
MAD[15], 133 MHz PCI-X Operation – Pulling this signal LOW
enables 133 MHz PCI-X operation. Pulling this signal HIGH disables
133 MHz PCI-X operation.
MAD[14], 64-bit PCI Operation – Pulling this signal LOW enables
64-bit PCI operation. Pulling this signal HIGH disables 64-bit PCI
operation.
MAD[13], 66 MHz PCI Operation – Pulling this signal LOW enables
66 MHz PCI operation. Pulling this signal HIGH disables the 66 MHz
PCI operation.
MAD[12:11] – Reserved.
MAD[10], MSI-X – Pulling this signal LOW enables MSI-X operation.
Pulling this signal HIGH disables MSI-X operation.
MAD[9] – Reserved.
MAD[8], PCI Hot Swap – Pulling this signal LOW indicates that PCI
Hot Swap is not implemented on the board. Pulling this signal HIGH
indicates that PCI Hot Swap is implemented on the board.
MAD[7], IOP Boot Sequence – Pulling this signal LOW enables the
IOP boot sequence following a reset. Pulling this signal HIGH
disables the IOP boot sequence.
MAD[6] – Reserved.
MAD[5], Subsystem Device ID Control – Pulling this signal LOW
programs bit 15 of the Subsystem Device ID register to 0b0. Pulling
this signal HIGH programs bit 15 of the Subsystem Device ID
register to 0b1. Refer to the
page 4-12
MAD[4] – Reserved.
MAD[3], Device ID Control – Pulling this signal LOW programs bit
0 of the Device ID register to 0b0. Pulling this signal HIGH programs
bit 0 of the Device ID register to 0b1.
MAD[2:1], Flash ROM Size – These pins configure the flash ROM
size.
for more information.
Subsystem ID
register description on
3-17