LSISAS1068 LSI, LSISAS1068 Datasheet - Page 37

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

2.3.2
Table 2.1
1. The LSISAS1068 ignores reserved commands as a slave and never generates them as a master.
2. When acting as a slave in the PCI mode, the LSISAS1068 supports this command as the PCI
3. When acting as a slave in the PCI mode, the LSISAS1068 supports this command as the PCI
C_BE[3:0]/ PCI Command
0b0000
0b0001
0b0010
0b0011
0b0100
0b0101
0b0110
0b0111
0b1000
0b1001
0b1010
0b1011
0b1100
0b1101
0b1110
0b1111
Memory Read command.
Memory Write command.
PCI Commands and Functions
Interrupt Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
Configuration Write
Memory Read Multiple
Dual Address Cycle
Memory Read Line
Memory Write and Invalidate
PCI/PCI-X Bus Commands and Encodings
Bus commands indicate to the target the type of transaction the master
is requesting. The master encodes the bus commands on the C_BE[3:0]/
lines during the address phase. The PCI bus command encodings
appear in
PCI Functional Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
Table
2.1.
PCI-X Command
Interrupt Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read Dword
Memory Write
Alias to
Memory Read Block
Alias to
Memory Write Block
Configuration Read
Configuration Write
Split Completion
Dual Address Cycle
Memory Read Block
Memory Write Block
1
as Master
PCI-X: No
PCI-X: No
Supports
PCI: N/A
PCI: N/A
N/A
N/A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
PCI-X: Yes
PCI-X: Yes
Supports
as Slave
PCI: N/A
PCI: N/A
Yes
Yes
Yes
Yes
Yes
N/A
N/A
Yes
Yes
Yes
Yes
Yes
No
No
2
2
3
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