LPC47N227TQFP Standard Microsystems (SMSC), LPC47N227TQFP Datasheet - Page 165

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LPC47N227TQFP

Manufacturer Part Number
LPC47N227TQFP
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47N227TQFP

Lead Free Status / RoHS Status
Not Compliant

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CR32 can only be accessed in the configuration state and after the CSR has been initialized to 32H.
CR32 is GPIO Polarity Register 1 and is used to select the polarity of GP10-GP17 pins.
CR33
CR33 can only be accessed in the configuration state and after the CSR has been initialized to 33H.
CR33 is GPIO Direction Register 2. It is used to select the direction of GP20-GP24 pins, and select
alternate function on GP23 and GP12 pins.
BIT NO.
BIT NO.
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
GP12 Alternate.
Function Select
Function Select
GP23 Alternate
Type: R/W
Type: R/W
BIT NAME
BIT NAME
Reserved
GP10
GP11
GP12
GP13
GP14
GP15
GP16
GP17
GP20
GP21
GP22
GP23
GP24
The bits in this register are used to select the polarity of the
GP10-GP17 pins.
0=Non-Inverted
1=Inverted
These bits are used to select the direction of the GP20-GP24.
0=Input
1=Output
Read Only. A read returns 0.
0=GPIO
1=FDC_PP (When this function is selected, the pin must be
selected as an input. Polarity is controlled by the polarity bit. If
enabled for PME or SMI, the interrupt is generated on either
edge.)
0=GPIO
1=nIO_SMI
Note: Selecting the nIO_SMI function with GP12 configured with
non-inverted polarity will give an active low output signal. The
output type can be programmed for open drain via CR39.
GPIO Direction Register 2
GPIO Polarity Register 1
Table 102 – CR32
Table 103 – CR33
165
DESCRIPTION
DESCRIPTION
Default: 0x00 on VTR POR
Default: 0x00 on VTR POR

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