RG82845 S L5YQ Intel, RG82845 S L5YQ Datasheet - Page 73

• Manufacturer Part Number: RG82845 S L5YQ
• Manufacturer: Intel

Specifications of RG82845 S L5YQ

• Lead Free Status / RoHS Status: Not Compliant

3.5.33
Intel
®
82845 MCH for SDR Datasheet
R
TOM—Top of Low Memory Register (Device 0)
Address Offset:
Default Value:
Access:
Size:
This register contains the maximum address below 4 GB that should be treated as a memory
access. Note that this register must be set to a value of 0100h (16 MB) or greater. Usually it will
sit below the areas configured for the hub interface, PCI memory, and the graphics aperture.
15:4
Bit
3:0
Top of Low Memory (TOM). This register contains the address that corresponds to bits 31 to
20 of the maximum system memory address that lies below 4 GB. Configuration software
should set this value to either the maximum amount of memory in the system or to the
minimum address allocated for PCI memory or the graphics aperture, whichever is smaller.
Programming Example: 400h = 1 GB. An access to 4000_0000h or above will be considered
above the TOM and therefore not routed to system memory. It may go to AGP, aperture, or
subtractively decode to the hub interface.
Reserved.
C4–C5h
0100h
R/W
16 bits
Description
Register Description
73