NH82801HBM S LA5Q Intel, NH82801HBM S LA5Q Datasheet - Page 26

• Manufacturer Part Number: NH82801HBM S LA5Q
• Manufacturer: Intel

Specifications of NH82801HBM S LA5Q

• Lead Free Status / RoHS Status: Compliant

PxSERR—Serial ATA Error Register (D31:F2)
Address Offset:
Default Value:
SDATA when SINDx.RIDX is 02h.
Bits 26:16 of this register contains diagnostic error information for use by diagnostic software in
validating correct operation or isolating failure modes. Bits 11:0 contain error information used by
host software in determining the appropriate response to the error condition. If one or more of bits
11:8 of this register are set, the controller will stop the current transfer.
Intel
®
ICH8 Family Specification Update
31:27
11:8
7:4
3:0
Bit
Bit
00000000h
Interface Power Management Transitions Allowed (IPM) — R/W. Indicates which
power states the ICH8 is allowed to transition to:
All other values reserved
Speed Allowed (SPD) — R/W. Indicates the highest allowable speed of the interface.
This speed is limited by the CAP.ISS (ABAR+00h:bit 23:20) field.
All other values reserved.
ICH8 Supports Generation 1 communication rates (1.5 Gb/s) and Gen 2 rates
(3.0 Gb/s).
Device Detection Initialization (DET) — R/W. Controls the ICH8’s device detection
and interface initialization.
All other values reserved.
When this field is written to a 1h, the ICH8 initiates COMRESET and starts the
initialization process. When the initialization is complete, this field shall remain 1h until
set to another value by software.
This field may only be changed to 1h or 4h when PxCMD.ST is 0. Changing this field
while the ICH8 is running results in undefined behavior.
Reserved
Value
Value
Value
0h
1h
2h
3h
0h
1h
2h
0h
1h
4h
Description
No interface restrictions
Transitions to the PARTIAL state disabled
Transitions to the SLUMBER state disabled
Transitions to both PARTIAL and SLUMBER states disabled
Description
No speed negotiation restrictions
Limit speed negotiation to Generation 1 communication rate
Limit speed negotiation to Generation 2 communication rate
Description
No device detection or initialization action requested
Perform interface communication initialization sequence to establish
communication. This is functionally equivalent to a hard reset and
results in the interface being reset and communications re-
initialized
Disable the Serial ATA interface and put Phy in offline mode
Attribute:
Size:
Description
Description
R/WC
32 bits
26