NH82801HBM S LA5Q Intel, NH82801HBM S LA5Q Datasheet - Page 21

• Manufacturer Part Number: NH82801HBM S LA5Q
• Manufacturer: Intel

Specifications of NH82801HBM S LA5Q

• Lead Free Status / RoHS Status: Compliant

Specification Changes
1.
Add the following specification to Table 155 of the Datasheet.
2.
The following changes apply to Section 5.19.7 of the Datasheet as indicated below.
5.19.7 USB 2.0 Power Management
5.19.7.1 Pause Feature
This feature allows platforms (especially mobile systems) to dynamically enter low-power states
during brief periods when the system is idle (i.e., between keystrokes). This is useful for enabling
power management features like Intel SpeedStep
these states typically are based on the recent history of system bus activity to incrementally enter
deeper power management states. Normally, when the EHC is enabled, it regularly accesses main
memory while traversing the DMA schedules looking for work to do; this activity is viewed by the
power management software as a non-idle system, thus preventing the power managed states to be
entered. Suspending all of the enabled ports can prevent the memory accesses from occurring, but
there is an inherent latency overhead with entering and exiting the suspended state on the USB ports
that makes this unacceptable for the purpose of dynamic power management. As a result, the EHCI
software drivers are allowed to pause the EHC’s DMA engines when it knows that the traffic patterns
of the attached devices can afford the delay. The pause only prevents the EHC from generating
memory accesses; the SOF packets continue to be generated on the USB ports (unlike the suspended
state)
5.19.7.2 USB Pre-Fetch Based Pause (Mobile Only)
The Pre-Fetch Based Pause is a power management feature in USB (EHCI) host controllers to ensure
maximum C3/C4 CPU power state time with C2 popup. This feature applies to the period schedule and
works by allowing the DMA engine to identify periods of idleness and prevents the DMA engine from
accessing memory when the periodic schedule is idle. Typically in the presence of periodic devices
with multiple millisecond poll periods, the periodic schedule will be idle for several frames between
polls.
The USB Pre-Fetch Based Pause feature is disabled by setting bit 4 of EHCI Configuration Register
Section 15.1.30
Intel
®
ICH8 Family Specification Update
SPI Specification Addition
USB 2.0 Power Management Description
I LI5
Input Leakage Current
signals
–
SPI
®
technology in the ICH8. The policies for entering
-
10
+10
µA
21