SAA7118E NXP Semiconductors, SAA7118E Datasheet - Page 50

• Manufacturer Part Number: SAA7118E
• Manufacturer: NXP Semiconductors

Specifications of SAA7118E

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

Table 10.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
Subject
Processed by task
State of detected
ITU 656 FID
TOGGLE flag
Bit D6 of SAV/EAV
byte
Required sequence
conversion at the
vertical scaler
Output
Single task every field; OFIDC = 0; subaddress 90h at 40h; TEB[80h[5]] = 0.
Tasks are used to scale to different output windows, priority on task B after SWRST.
Both tasks at
In examples 3 and 4 the association between input FID and tasks can be flipped, dependent on which time the SWRST is de-asserted.
Task B at
Task A and B at
State of prior field.
It is assumed that input/output FID = 0 (= upper lines); UP = upper lines; LO = lower lines.
O = data output; NO = no output.
[9]
Examples for field processing
2
[8]
3
frame rate constructed from neighboring motion phases; task A at
1
2
1
frame rate; OFIDC = 0; subaddresses 90h at 43h and C0h at 42h.
3
frame rate of equidistant motion phases; OFIDC = 1; subaddresses 90h at 41h and C0h at 49h.
Field sequence frame/field
Example 1
1/1
A
0
1
0
UP
UP
O
1/2
A
1
0
1
LO
LO
O
[1]
2/1
A
0
1
0
UP
UP
O
Example 2
1/1
B
0
1
0
UP
UP
O
1/2
A
1
1
1
LO
LO
O
[2][3]
2/1
B
0
0
0
UP
UP
O
2/2
A
1
0
1
LO
LO
O
Example 3
1/1
B
0
1
1
UP
LO
O
1
3
frame rate of equidistant motion phases; OFIDC = 1; subaddresses 90h at 41h and C0h at 45h.
1/2
B
1
0
0
LO
UP
O
[2][4][5]
2/1
UP
LO
A
0
1
1
O
2/2
B
1
1
1
LO
LO
O
3/1
B
0
0
0
UP
UP
O
3/2
A
1
0
0
LO
UP
O
Example 4
1/1
B
0
0
0
UP
UP
NO
[7]
[7]
1/2
B
1
1
1
LO
LO
O
[2][4][6]
2/1
A
0
1
1
UP
LO
O
2/2
B
1
1
1
LO
LO
NO
[7]
[7]
3/1
0
0
UP
UP
B
0
O
3/2
A
1
0
0
LO
UP
O