SAA7118E NXP Semiconductors, SAA7118E Datasheet - Page 134

• Manufacturer Part Number: SAA7118E
• Manufacturer: NXP Semiconductors

Specifications of SAA7118E

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 111. X port formats and configuration; register set A [91h[7:3]] and B [C1h[7:3]]
[1]
Table 112. X port formats and configuration; register set A [91h[2:0]] and B [C1h[2:0]]
[1]
[2]
Table 113. X port input reference signal definitions; register set A [92h[7:4]] and B [C2h[7:4]]
SAA7118_7
Product data sheet
Scaler input format and configuration source selection
Only if XRQT[83h[2]] = 1: scaler input source reacts on SAA7118
request
Scaler input source is a continuous data stream, which cannot be
interrupted (must be logic 1, if SAA7118 decoder part is source of
scaler or XRQT[83h[2]] = 0)
Scaler input source is data from decoder, data type is provided
according to
Scaler input source is Y-C
Scaler input source is raw digital CVBS from selected analog
channel, for backward compatibility only, further use is not
recommended
Scaler input source is raw digital CVBS (or 16-bit Y + C
16-bit outputs are active) from X port
SAV/EAV code bits D6 and D5 (F and V) may change between
SAV and EAV
SAV/EAV code bits D6 and D5 (F and V) are synchronized to
scalers output line start
SAV/EAV code bit D5 (V) and V gate on pin IGPV as generated by
the internal processing; see
SAV/EAV code bit D5 (V) and V gate are inverted
Scaler input format and configuration format control
Input is Y-C
Input is Y-C
Chroma is provided every line, default
Chroma is provided every 2nd line
Chroma is provided every 3rd line
Chroma is provided every 4th line
X port input reference signal definitions
Rising edge of XRV input and decoder V123 is vertical reference
Falling edge of XRV input and decoder V123 is vertical reference
XRV is a V-sync or V gate signal
X = don’t care.
X = don’t care.
FSC2 and FSC1 only to be used, if X port input source does not provide chroma information for every input line. X port input stream
must contain dummy chroma bytes.
B
B
-C
-C
Table 15
10.7.6 Subaddresses 91h to 93h
R
R
4 : 2 : 2 like sampling scheme
4 : 1 : 1 like sampling scheme
B
-C
Figure 47
R
data from X port
Rev. 07 — 7 July 2008
B
-C
R
Multistandard video decoder with adaptive comb filter
, if no
Control bits D7 to D3
CONLV
X
X
X
X
X
X
X
X
0
1
Control bits D2 to D0
FSC2
X
X
0
0
1
1
Control bits D7 to D4
XFDV
X
X
X
[2]
HLDFV
X
X
X
X
X
X
0
1
X
X
XFDH
X
X
X
FSC1
X
X
0
1
0
1
SCSRC1 SCSRC0 SCRQE
X
X
0
0
1
1
X
X
X
X
[1]
[1]
[2]
XDV1
X
X
0
[1]
SAA7118
X
X
0
1
0
1
X
X
X
X
© NXP B.V. 2008. All rights reserved.
FSC0
0
1
X
X
X
X
XDV0
0
1
X
0
1
X
X
X
X
X
X
X
X
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