PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 270

16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R

PIC18F64J11T-I/PT

Manufacturer Part Number
PIC18F64J11T-I/PT
Description
16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC18F64J11T-I/PTTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F64J11T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F85J11 FAMILY
21.1
There are eight modes of operation for the compara-
tors, shown in Figure 21-1. Bits, CM<2:0> of the
CMCON register, are used to select these modes. The
TRISF register controls the data direction of the
comparator pins for each mode. If the Comparator
FIGURE 21-1:
DS39774D-page 270
Comparator Outputs Disabled
CM<2:0> = 000
Two Independent Comparators
CM<2:0> = 010
Two Common Reference Comparators
CM<2:0> = 100
One Independent Comparator with Output
CM<2:0> = 001
RF6/AN11
RF5/AN10/
CV
RF4/AN9
RF3/AN8
RF6/AN11
RF5/AN10/
CV
RF4/AN9
RF3/AN8
RF6/AN11
RF5/AN10/
CV
RF4/AN9
RF3/AN8
RF6/AN11
RF5/AN10/
CV
RF2/AN7/C1OUT*
RF4/AN9
RF3/AN8
A = Analog Input, port reads zeros always
* Setting the TRISF<2:1> bits will disable the comparator outputs by configuring the pins as inputs.
REF
REF
REF
REF
Comparator Configuration
A
A
A
A
A
A
A
A
A
A
A
D
A
A
D
D
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
COMPARATOR I/O OPERATING MODES
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
Off (Read as ‘0’)
Off (Read as ‘0’)
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
Off (Read as ‘0’)
D = Digital Input
Two Common Reference Comparators with Outputs
CM<2:0> = 101
Two Independent Comparators with Outputs
CM<2:0> = 011
Comparators Off (POR Default Value)
CM<2:0> = 111
Four Inputs Multiplexed to Two Comparators
CM<2:0> = 110
RF6/AN11
RF5/AN10/
CV
RF4/AN9
RF3/AN8
RF6/AN11
RF5/AN10/
CV
RF4/AN9
RF3/AN8
RF1/AN6/C2OUT*
RF6/AN11
RF5/AN10
CV
RF2/AN7/C1OUT*
RF4/AN9
RF3/AN8
RF1/AN6/C2OUT*
RF6/AN11
RF5/AN10/
CV
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT*
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown in
Section 26.0 “Electrical Characteristics”.
REF
REF
REF
REF
Note:
CIS (CMCON<3>) is the Comparator Input Switch
A
A
A
A
D
D
D
D
A
A
A
A
A
A
A
D
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
V
V
V
V
V
V
V
V
CIS = 0
CIS = 1
CIS = 0
CIS = 1
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
 2010 Microchip Technology Inc.
C1
C2
C1
C2
C1
C2
V
V
V
V
IN
IN
IN
IN
CV
-
+
-
+
REF
C1OUT
C2OUT
Off (Read as ‘0’)
Off (Read as ‘0’)
C1
C2
C1OUT
C2OUT
From V
REF
C1OUT
C2OUT
module

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