PIC18F43K20-E/MV Microchip Technology, PIC18F43K20-E/MV Datasheet - Page 325

• Manufacturer Part Number: PIC18F43K20-E/MV
• Description: 8KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TUB
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F43K20-E/MV

• Processor Series: PIC18
• Core: PIC18F
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, SCI, USB, MSSP, RJ11
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Supply Current (max): 30 uA
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

BNC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If CARRY
If CARRY
Q1
Q1
No
PC
PC
Read literal
Read literal
operation
Branch if Not Carry
BNC
-128  n  127
if CARRY bit is ‘0’
(PC) + 2 + 2n  PC
None
If the CARRY bit is ‘0’, then the program
will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
Q2
No
Q2
‘n’
‘n’
=
=
=
=
=
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
0011
BNC
operation
Process
Process
Data
Data
Q3
No
Q3
Jump
nnnn
Write to PC
operation
operation
Q4
Q4
No
No
nnnn
BNN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
PIC18F2XK20/4XK20
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If NEGATIVE =
If NEGATIVE =
Q1
No
Q1
PC
PC
Read literal
Read literal
operation
Branch if Not Negative
BNN
-128  n  127
if NEGATIVE bit is ‘0’
(PC) + 2 + 2n  PC
None
If the NEGATIVE bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
Q2
No
Q2
‘n’
‘n’
=
=
=
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
0111
BNN
operation
Process
Process
Data
Data
Q3
No
Q3
DS41303G-page 325
Jump
nnnn
Write to PC
operation
operation
Q4
Q4
No
No
nnnn