PIC18F43K20-E/MV Microchip Technology, PIC18F43K20-E/MV Datasheet - Page 169

8KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TUB

PIC18F43K20-E/MV

Manufacturer Part Number
PIC18F43K20-E/MV
Description
8KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TUB
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F43K20-E/MV

Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
15.0
The Timer3 module timer/counter incorporates these
features:
• Software selectable operation as a 16-bit timer or
• Readable and writable 8-bit registers (TMR3H
• Selectable clock source (internal or external) with
• Interrupt-on-overflow
• Module Reset on CCP Special Event Trigger
REGISTER 15-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6,3
bit 5-4
bit 2
bit 1
bit 0
counter
and TMR3L)
device clock or Timer1 oscillator internal options
R/W-0
RD16
TIMER3 MODULE
RD16: 16-bit Read/Write Mode Enable bit
1 = Enables register read/write of Timer3 in one 16-bit operation
0 = Enables register read/write of Timer3 in two 8-bit operations
T3CCP<2:1>: Timer3 and Timer1 to CCPx Enable bits
1x = Timer3 is the capture/compare clock source for CCP1 and CP2
01 = Timer3 is the capture/compare clock source for CCP2 and
00 = Timer1 is the capture/compare clock source for CCP1 and CP2
T3CKPS<1:0>: Timer3 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
T3SYNC: Timer3 External Clock Input Synchronization Control bit
(Not usable if the device clock comes from Timer1/Timer3.)
When TMR3CS = 1:
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMR3CS = 0:
This bit is ignored. Timer3 uses the internal clock when TMR3CS = 0.
TMR3CS: Timer3 Clock Source Select bit
1 = External clock input from Timer1 oscillator or T13CKI (on the rising edge after the first
0 = Internal clock (F
TMR3ON: Timer3 On bit
1 = Enables Timer3
0 = Stops Timer3
T3CCP2
R/W-0
falling edge)
Timer1 is the capture/compare clock source for CCP1
T3CON: TIMER3 CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
T3CKPS1
R/W-0
OSC
/4)
T3CKPS0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T3CCP1
R/W-0
A simplified block diagram of the Timer3 module is
shown in Figure 15-1. A block diagram of the module’s
operation in Read/Write mode is shown in Figure 15-2.
The Timer3 module is controlled through the T3CON
register (Register 15-1). It also selects the clock source
options for the CCP modules (see Section 11.1.1
“CCP Modules and Timer Resources” for more
information).
PIC18F2XK20/4XK20
T3SYNC
R/W-0
x = Bit is unknown
TMR3CS
R/W-0
DS41303G-page 169
TMR3ON
R/W-0
bit 0

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