MCP4728T-E/UN Microchip Technology, MCP4728T-E/UN Datasheet - Page 6

Quad, 12-bit NV DAC With I2C Interface 10 MSOP 3x3mm T/R

MCP4728T-E/UN

Manufacturer Part Number
MCP4728T-E/UN
Description
Quad, 12-bit NV DAC With I2C Interface 10 MSOP 3x3mm T/R
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP4728T-E/UN

Settling Time
6µs
Number Of Bits
12
Data Interface
I²C
Number Of Converters
4
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP4728EV - BOARD EVAL 12BIT 4CH DAC MCP4728
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4728T-E/UN
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
MCP4728T-E/UN
0
MCP4728
ELECTRICAL CHARACTERISTICS (CONTINUED)
DS22187E-page 6
Electrical Specifications: Unless otherwise indicated, all parameters apply at V
R
Dynamic Performance
Major Code Transition
Glitch
Digital Feedthrough
Analog Crosstalk
DAC-to-DAC Crosstalk
Digital Interface
Output Low Voltage
Schmitt Trigger
Low Input
Threshold Voltage
Schmitt Trigger
High Input
Threshold Voltage
Input Leakage
Pin Capacitance
EEPROM
EEPROM Write Time
Data Retention
LDAC Input
LDAC Low Time
Note 1:
L
= 5 kΩ, C
2:
3:
4:
5:
6:
7:
8:
9:
Parameter
All digital input pins (SDA, SCL, LDAC) are tied to “High”, Output pins are unloaded, code = 0 x 000.
The power-up ramp rate measures the rise of V
This parameter is ensured by design and not 100% tested.
This parameter is ensured by characterization and not 100% tested.
Test code range: 100 - 4000 codes, V
Time delay to settle to a new reference when switching from external to internal reference or vice versa.
This parameter is indirectly tested by Offset and Gain error testing.
Within 1/2 LSB of the final value when code changes from 1/4 of to 3/4 of full scale.
This time delay is measured from the falling edge of ACK pulse in I
This time delay is not included in the output settling time specification.
L
= 100 pF, G
(Note
X
= 1, T
Symbol
T
T
4)
C
WRITE
V
LDAC
V
V
I
PIN
OL
LI
A
IH
IL
= -40°C to +125°C. Typical values are at +25°C, V
0.7V
Min
210
DD
REF
Typical
= V
<10
<10
<10
200
45
25
DD
DD
, V
0.3V
0.2V
DD
over time.
Max
0.4
±1
50
3
= 5.5V.
DD
DD
Units
Years
nV-s
nV-s
nV-s
nV-s
ms
µA
pF
ns
V
V
V
V
2
C command to the beginning of V
DD
1 LSB code change around major
carry (from 7FFh to 800h)
I
SDA and RDY/BSY pins
V
SDA, SCL, LDAC pins
V
SDA, SCL, LDAC pins
SDA, SCL, LDAC pins
SCL = SDA = LDAC = V
SCL = SDA = LDAC = V
Note 4
EEPROM write time
At +25°C,
Updates analog outputs
OL
DD
DD
= +2.7V to 5.5V, V
= 3 mA
IH
> 2.7V.
≤ 2.7V.
© 2010 Microchip Technology Inc.
= V
DD
Note 3
Conditions
, V
IL
= V
SS.
SS
= 0V,
DD
SS
(Note
,
OUT
3)
.

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