MCP4728T-E/UN Microchip Technology, MCP4728T-E/UN Datasheet - Page 42

• Manufacturer Part Number: MCP4728T-E/UN
• Description: Quad, 12-bit NV DAC With I2C Interface 10 MSOP 3x3mm T/R
• Manufacturer: Microchip Technology

Specifications of MCP4728T-E/UN

• Settling Time: 6µs
• Number Of Bits: 12
• Data Interface: I²C
• Number Of Converters: 4
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP4728EV - BOARD EVAL 12BIT 4CH DAC MCP4728
• Power Dissipation (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP4728
FIGURE 5-11:
DS22187E-page 42
Start
Command Type Bits:
S 1 1 0 0 A2 A1 A0 0 A 0 1 1 A2 A1 A0 0 1 A 0 1 1 A2 A1 A0 1 0 A 0
Note:
Clock Pulse
(CLK Line)
Clock and LDAC Transition Details:
LDAC Pin
Note 1: Clock Pulse and LDAC Transition Details.
LDAC Pin
Device
Code
2: LDAC pin events at the 2nd and 3rd bytes:
3: LDAC pin resumes its normal function after “Stop” bit.
4: EEPROM Write:
1st Byte
The I
on page 65 for details.
a.
b.
c.
a.
b.
5
Address Bits
2nd Byte
Current
2
Keep LDAC pin “High” until the end of the positive pulse of the 8th clock of the 2nd byte.
LDAC pin makes a transition from “High” to “Low” during the negative pulse of the 8th clock of the 2nd byte
(just before the rising edge of the 9th clock), and stays “Low” until the rising edge of the 9th clock of the 3rd
byte.
Charge Pump initiates the EEPROM write sequence at the falling edge of the 4th byte’s ACK pulse.
The RDY/BSY bit (pin) goes “Low” at the falling edge of this ACK clock and back to “High” immediately after
the EEPROM write is completed.
C address bits can also be programmed at the factory for customers. See the Product Identification System
The MCP4728 device does not acknowledge the 3rd byte if the conditions (a) and (b) are not met.
6
Note 2 (a)
Write Command: Write I
R/W
7
C2=0
(C2 C1 C0)
Command
8
Type
9
C1=1
Note 2(b)
Address Bits
Current
1
2nd Byte
C0=1
2
Stay “Low” during this 3rd byte
2
C Address Bits to the DAC Registers and EEPROM.
3
Note 2(b)
Command
Type
4
3rd Byte
(Notes 1, 2, 3)
ACK (MCP4728)
3rd Byte
5
Address Bits
New
6
7
8
Command
Type
9
© 2010 Microchip Technology Inc.
1
Note 3
1 A2 A1 A0 1 1 A P
1
4th Byte
New Address Bits
Note 3
(for confirmation)
4th Byte
-----
Note 4
Note 4
9
Stop
P
Stop