MCP4728T-E/UN Microchip Technology, MCP4728T-E/UN Datasheet - Page 48

• Manufacturer Part Number: MCP4728T-E/UN
• Description: Quad, 12-bit NV DAC With I2C Interface 10 MSOP 3x3mm T/R
• Manufacturer: Microchip Technology

Specifications of MCP4728T-E/UN

• Settling Time: 6µs
• Number Of Bits: 12
• Data Interface: I²C
• Number Of Converters: 4
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP4728EV - BOARD EVAL 12BIT 4CH DAC MCP4728
• Power Dissipation (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP4728
FIGURE 6-2:
6.5
Offset error (see
voltage output when the digital input code is zero (zero
scale voltage). This error affects all codes by the same
amount. For the MCP4728 device, the offset error is
not trimmed at the factory. However, it can be calibrated
by software in application circuits.
FIGURE 6-3:
6.6
Gain error (see
the actual full scale output voltage from the ideal output
voltage of the DAC transfer curve. The gain error is
calculated after nullifying the offset error, or full scale
error minus the offset error.
The gain error indicates how well the slope of the actual
transfer function matches the slope of the ideal transfer
function. The gain error is usually expressed as percent
of full scale range (% of FSR) or in LSB.
DS22187E-page 48
Offset
Analog
Output
Error
(LSB)
Analog
Output
Offset Error
Gain Error
6
5
0
7
4
3
2
1
0
000
Actual Transfer Function
001
Actual Transfer Function
Ideal Transfer Function
Figure
DNL = 2 LSB
Figure
010
DAC Input Code
DNL Accuracy.
Offset Error.
6-4) is the difference between
6-3) is the deviation from zero
011
DNL = 0.5 LSB
DAC Input Code
Ideal Transfer Function
100 101
110
111
For the MCP4728 device, the gain error is not
calibrated at the factory and most of the gain error is
contributed by the output buffer (op amp) saturation
near the code range beyond 4000. For applications that
need the gain error specification less than 1%
maximum, a user may consider using the DAC code
range between 100 and 4000 instead of using full code
range (code 0 to 4095). The DAC output of the code
range between 100 and 4000 is much more linear than
full scale range (0 to 4095). The gain error can be
calibrated out by using applications’ software.
6.7
Full scale error (see
error plus gain error. It is the difference between the
ideal and measured DAC output voltage with all bits set
to one (DAC input code = FFFh).
EQUATION 6-4:
FIGURE 6-4:
Error.
6.8
Gain error drift is the variation in gain error due to a
change in ambient temperature. The gain error drift is
typically expressed in ppm/°C.
Where:
FSE is expressed in LSB.
Analog
Output
V
V
Ideal
REF
0
Full Scale Error (FSE)
Actual Transfer Function
Gain Error Drift
=
=
(V
Voltage Reference
FSE
REF
) (1 - 2
=
Figure
Gain Error and Full Scale
© 2010 Microchip Technology Inc.
(
---------------------------------------
V
DAC Input Code
OUT
-n
after Offset Error is removed
6-4) is the sum of offset
LSB
) - Offset Voltage (V
Actual Transfer Function
Ideal Transfer Function
–
V
Ideal
)
Full Scale
Error
Gain Error
OS
)