MCP4728T-E/UN Microchip Technology, MCP4728T-E/UN Datasheet - Page 30

Quad, 12-bit NV DAC With I2C Interface 10 MSOP 3x3mm T/R

MCP4728T-E/UN

Manufacturer Part Number
MCP4728T-E/UN
Description
Quad, 12-bit NV DAC With I2C Interface 10 MSOP 3x3mm T/R
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP4728T-E/UN

Settling Time
6µs
Number Of Bits
12
Data Interface
I²C
Number Of Converters
4
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP4728EV - BOARD EVAL 12BIT 4CH DAC MCP4728
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4728T-E/UN
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
MCP4728T-E/UN
0
MCP4728
5.2.5
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse, which is associated with this acknowledge bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
FIGURE 5-1:
5.3
The address byte is the first byte received following the
START condition from the master device. The first part
of the address byte consists of a 4-bit device code,
which is set to 1100 for the MCP4728 device. The
device code is followed by three I
A1, A0) which are programmable by the users.
Although the three address bits are programmable at
the user’s application PCB, the user can also specify
the address bits during the product ordering process. If
there is no user’s request, the factory default setting of
the three address bits is “000”, programmed into the
EEPROM. The three address bits allow eight unique
addresses.
FIGURE 5-2:
DS22187E-page 30
SDA
SCL
Device Code: Programmed (hard-wired) at the
factory.
Address Bits: Reprogrammable into EEPROM by
the user.
Start bit
(A)
MCP4728 Device Addressing
ACKNOWLEDGE
1
Slave Address for MCP4728
CONDITION
Device Code
1
START
Slave Address
(B)
Address Byte
0
Data Transfer Sequence On The Serial Bus.
Device Addressing.
Read/Write bit
0
Acknowledge bit
A2 A1 A0
Address Bits
2
C address bits (A2,
ACKNOWLEDGE
ADDRESS OR
R/W ACK
VALID
(D)
TO CHANGE
ALLOWED
DATA
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must send an end of
data to the slave by not generating an acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (MCP4728) will leave the data
line HIGH to enable the master to generate the STOP
condition.
5.3.1
When the customer first receives any new MCP4728
device, its default address bit setting is “000” if the
address bit programming was not requested. The
customer can reprogram the I
EEPROM by using “Write Address Bit” command. This
write command needs current address bits. If the
address bits are unknown, the user can find them by
sending “General Call Read Address” Command. The
LDAC pin is also used to select the device of interest to
be programmed or to read the current address.
The following steps are needed for the I
programming.
(a) Read the address bits using “General Call Read
Address” Command. (This is the case when the
address is unknown.)
(b) Write I
Bits” Command.
The Write Address command will replace the current
address with a new address in both input registers and
EEPROM.
See
for the details of reading the address bits, and
Section 5.6.8 “Write Command: Write I2C Address
bits (C2=0, C1=1, C0=1)”
Section 5.4.4 “General Call Read Address Bits”
2
C address bits using “Write I
PROGRAMMING OF I
BITS
(D)
© 2010 Microchip Technology Inc.
for writing the address bits.
2
C address bits into the
2
C ADDRESS
CONDITION
2
2
C Address
STOP
C address
(C)
(A)

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