MCP4728T-E/UN Microchip Technology, MCP4728T-E/UN Datasheet - Page 47

• Manufacturer Part Number: MCP4728T-E/UN
• Description: Quad, 12-bit NV DAC With I2C Interface 10 MSOP 3x3mm T/R
• Manufacturer: Microchip Technology

Specifications of MCP4728T-E/UN

• Settling Time: 6µs
• Number Of Bits: 12
• Data Interface: I²C
• Number Of Converters: 4
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP4728EV - BOARD EVAL 12BIT 4CH DAC MCP4728
• Power Dissipation (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.0
6.1
The resolution is the number of DAC output states that
divide the full scale range. For the 12-bit DAC, the
resolution is 2
to 4095.
6.2
The least significant bit is the ideal voltage difference
between two successive codes.
EQUATION 6-1:
6.3
Integral nonlinearity (INL) error is the maximum
deviation of an actual transfer function from an ideal
transfer function (straight line). In the MCP4728, INL is
calculated using two end-points (zero and full scale).
INL can be expressed as a percentage of full scale
range (FSR) or in fractions of an LSB. INL is also called
relative accuracy.
the INL error in LSB and
of INL accuracy.
EQUATION 6-2:
© 2010 Microchip Technology Inc.
Where:
Where:
INL is expressed in LSB
V
V
V
Ideal
OUT
REF
n
TERMINOLOGY
Resolution
Least Significant Bit (LSB)
Integral Nonlinearity (INL)
=
=
=
=
=
LSB
12
The number of digital input bits,
n = 12 for MCP4728
2.048V If internal reference is
INL
, meaning the DAC code ranges from 0
V
Code*LSB
The output voltage measured at
the given input code
DD
Equation 6-2
=
=
=
=
V
------------ -
(
---------------------------------------------------------
(
---------------------------------------------------------
V
V
REF
2
INL ERROR
Full Scale
Full Scale
If external reference is
selected
selected
(
-------------------------------------- -
n
V
Figure 6-1
OUT
2
LSB
4095
12
–
–
–
shows how to calculate
V
–
V
V
Ideal
1
Zero Scale
Zero Scale
shows an example
)
)
)
FIGURE 6-1:
6.4
Differential nonlinearity (DNL) error (see
the measure of step size between codes in actual
transfer function. The ideal step size between codes is
1 LSB. A DNL error of zero would imply that every code
is exactly 1 LSB wide. If the DNL error is less than
1 LSB, the DAC guarantees monotonic output and no
missing codes. The DNL error between any two
adjacent codes is calculated as follows:
EQUATION 6-3:
Where:
DNL is expressed in LSB.
Analog
Output
ΔV
(LSB)
OUT
7
6
5
1
0
4
3
2
Differential Nonlinearity (DNL)
000
INL = 0.5 LSB
=
001
DNL
The measured DAC output
voltage difference between two
adjacent input codes
010
Ideal Transfer Function
Actual Transfer Function
=
INL Accuracy.
DNL ERROR
ΔV
--------------------------------- -
011
DAC Input Code
INL = - 1 LSB
OUT
LSB
100 101
MCP4728
–
LSB
INL = < -1 LSB
DS22187E-page 47
110
Figure
111
6-2) is