PEF81902FV1.1 Lantiq, PEF81902FV1.1 Datasheet - Page 218

• Manufacturer Part Number: PEF81902FV1.1
• Manufacturer: Lantiq

Specifications of PEF81902FV1.1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

•
Parameter
IOM
DCL period
DCL high
DCL low
Input data setup
Input data hold
Output data from high impedance to
active
(FSC high or other than first timeslot)
Output data from active to high
impedance
Output data delay from clock
FSC high
FSC advance to DCL
BCL high
BCL low
BCL period
FSC advance to BCL
DCL, FSC rise/fall
Data out fall (C
V
Data out rise/fall
(C
Strobe Signal Delay
Note: At the start and end of a reset period, a frame jump may occur. This results in a
Data Sheet
DD
L
= 50 pF, tristate)
, open drain)
®
-2 Interface
DCL, BCL and FSC high time of min. 130 ns after this specific event.
L
= 50 pF, R = 2 k to
Symbol Limit values
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
204
Min
565
200
200
20
20
65
565
565
1130
65
Typ
651
310
310
50% of
FSC
cycle
time
130
651
651
1302
130
Electrical Characteristics
Max
735
420
420
100
100
80
195
735
735
1470
195
30
200
150
120
PEF 81902
2001-11-12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns