PEF81902FV1.1 Lantiq, PEF81902FV1.1 Datasheet - Page 173

• Manufacturer Part Number: PEF81902FV1.1
• Manufacturer: Lantiq

Specifications of PEF81902FV1.1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

C/R
4.4.17
TMH
Value after reset: 00
Data Sheet
Note: If SAP1 and SAP2 contain identical values, the combination SAP1,2-TEIG will
Note: The contents of RSTA corresponds to the last received HDLC frame; it is
only be indicated by SAP1,0 = ’10’ (i.e. the value ’00’ will not occur in this case).
duplicated into RFIFO for every frame (last byte of frame).
r(0)
7
These bits are only relevant in modes with address comparison.
The result of the address comparison is given by SA1-0 and TA, as follows:
MDS2-0
010
(Non-Auto/8
Mode)
011
(Non-Auto/16
Mode)
111
(Transparent
Mode 1)
101
(Transparent
Mode 2)
Command/Response
The C/R bit contains the C/R bit of the received frame (Bit1 in the SAPI
address).
TMH -Test Mode Register HDLC
r(0)
H
r(0)
SA1
x
x
0
0
0
0
1
1
0
0
1
-
-
1
SA0
x
x
0
0
1
1
0
0
0
1
0
-
-
1
r(0)
read/write
159
TA
0
1
0
1
0
1
0
1
x
x
x
0
1
x
r(0)
Address Match with
1
TEI2
TEI1
SAP2
SAP2
SAPG
SAPG
SAP1
SAP1
SAP2
SAPG
SAP1
-
-
st
reserved
Byte
r(0)
Register Description
Address:
r(0)
2
-
-
TEIG
TEI2
TEIG
TEI1 or TEI2
TEIG
TEI1
-
-
-
TEIG
TEI1 or TEI2
nd
PEF 81902
Byte
2001-11-12
TLP
0
29
H