AM79C972BKI\W AMD (ADVANCED MICRO DEVICES), AM79C972BKI\W Datasheet - Page 64

• Manufacturer Part Number: AM79C972BKI\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C972BKI\W

• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

frames which have a length field of 46 bytes or greater
will be passed to the host unmodified.
Since any valid Ethernet Type field value will always be
greater than a normal IEEE 802.3 Length field ( 46),
the Am79C972 controller will not attempt to strip valid
Ethernet frames. Note that for some network protocols,
the value passed in the Ethernet Type and/or IEEE
802.3 Length field is not compliant with either standard
and may cause problems if pad stripping is enabled.
Receive FCS Checking
Reception and checking of the received FCS is per-
formed automatically by the Am79C972 controller.
Note that if the Automatic Pad Stripping feature is en-
abled, the FCS for padded frames will be verified
against the value computed for the incoming bit stream
including pad characters, but the FCS value for a pad-
ded frame will not be passed to the host. If an FCS
error is detected in any frame, the error will be reported
in the CRC bit in RMD1.
Receive Exception Conditions
Exception conditions for frame reception fall into two
distinct categories, i.e., those conditions which are the
result of normal network operation, and those which
occur due to abnormal network and/or host related
events.
Normal events which may occur and which are handled
autonomously by the Am79C972 controller are basi-
64
Increasing Time
1010....1010
Preamble
Start of Frame
at Time = 0
Bits
56
Figure 34. IEEE 802.3 Frame And Length Field Transmission Order
10101011
SFD
Bits
8
Destination
Address
Bytes
6
Bit
0
Address
Am79C972
Source
Bytes
Significant
6
Most
Byte
Figure 34 shows the byte/bit ordering of the received
length field for an IEEE 802.3-compatible frame format.
cally collisions within the slot time and automatic runt
packet rejection. The Am79C972 controller will ensure
that collisions that occur within 512 bit times from the
start of reception (excluding preamble) will be automat-
ically deleted from the receive FIFO with no host inter-
vention. The receive FIFO will delete any frame that is
composed of fewer than 64 bytes provided that the
Runt Packet Accept (RPA bit in CSR124) feature has
not been enabled and the network interface is operat-
ing in half-duplex mode, or the full-duplex Runt Packet
Accept Disable bit (FDRPAD, BCR9, bit 2) is set. This
criterion will be met regardless of whether the receive
frame was the first (or only) frame in the FIFO or if the
receive frame was queued behind a previously re-
ceived message.
Abnormal network conditions include:
n FCS errors
n Late collision
Host related receive exception conditions include
MISS, BUFF, and OFLO. These are described in the
section, Buffer Management Unit.
Loopback Operation
Loopback is a mode of operation intended for system
diagnostics. In this mode, the transmitter and receiver
Bit
Length
7
Bytes
2
Bit
0
Significant
1 — 1500
Bytes
Least
Byte
Data
LLC
46 — 1500
Bytes
Bit
7
45 — 0
Bytes
Pad
Bytes
FCS
4
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