AM79C972BKI\W AMD (ADVANCED MICRO DEVICES), AM79C972BKI\W Datasheet - Page 21

• Manufacturer Part Number: AM79C972BKI\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C972BKI\W

• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

ternally in a D flip-flop. During subsequent cycles of a
boot device access, address bits [7:0] are present on
these pins.
All EBUA_EBA[7:0] outputs are forced to a constant
level to conserve power while no access on the Expan-
sion Bus is being performed.
EBDA[15:8]
Expansion Bus Data/Address [15:8]
When EROMCS is asserted low, EBDA[15:8] contain
address bits [15:8] for boot device accesses.
The EBDA[15:8] signals are driven to a constant level
to conserve power while no access on the Expansion
Bus is being performed.
EBD[7:0]
Expansion Bus Data [7:0]
The EBD[7:0] pins provide data bits [7:0] for EPROM/
FLASH accesses. The EBD[7:0] signals are internally
forced to a constant level to conserve power while no
access on the Expansion Bus is being performed.
EROMCS
Expansion ROM Chip Select
EROMCS serves as the chip select for the boot device.
It is asserted low during the data phases of boot device
accesses.
AS_EBOE
Address Strobe/Expansion Bus
Output Enable
AS_EBOE functions as the address strobe for the
upper address bits on the EBUA_EBA[7:0] pins and as
the output enable for the Expansion Bus.
As an address strobe, a rising edge on AS_EBOE is
supplied at the beginning of boot device accesses. This
rising edge provides a clock edge for a ‘374 D-type
edge-triggered flip-flop which must store the upper ad-
dress byte during Expansion Bus accesses for
EPROM/Flash.
AS_EBOE is asserted active LOW during boot device
read operations on the expansion bus and is deas-
serted during boot device write operations.
EBWE
Expansion Bus Write Enable
EBWE provides the write enable for write accesses to
the Flash device.
EBCLK
Expansion Bus Clock
EBCLK may be used as the fundamental clock to drive
the Expansion Bus and internal SRAM access cycles.
The actual internal clock used to drive the Expansion
Input/Output
Input/Output
Output
Output
Output
Input
Am79C972
Bus cycles depends on the values of the EBCS and
CLK_FAC settings in BCR27. Refer to the SRAM Inter-
face Bandwidth Requirements section for details on de-
termining the required EBCLK frequency. If a clock
source other than the EBCLK pin is programmed
(BCR27, bits 5:3) to be used to run the Expansion Bus
interface, this input should be tied to VDD through a 4.7
k resistor.
EBCLK is not used to drive the bus interface, internal
buffer management unit, or the network functions.
Media Independent Interface
TX_CLK
Transmit Clock
TX_CLK is a continuous clock input that provides the
timing reference for the transfer of the TX_EN,
TXD[3:0], and TX_ER signals out of the Am79C972
device. TX_CLK must provide a nibble rate clock (25%
of the network data rate). Hence, an MII transceiver op-
erating at 10 Mbps must provide a TX_CLK frequency
of 2.5 MHz and an MII transceiver operating at 100
Mbps must provide a TX_CLK frequency of 25 MHz.
Note: The TX_CLK pin is multiplexed with the TXCLK
pin.
TXD[3:0]
Transmit Data
TXD[3:0] is the nibble-wide MII transmit data bus. Valid
data is generated on TXD[3:0] on every TX_CLK rising
edge while TX_EN is asserted. While TX_EN is de-
asserted, TXD[3:0] values are driven to a 0. TXD[3:0]
transitions synchronous to TX_CLK rising edges.
Note: The TXD[0] pin is multiplexed with the TXD pin.
TX_EN
Transmit Enable
TX_EN indicates when the Am79C972 device is pre-
senting valid transmit nibbles on the MII. While TX_EN
is asserted, the Am79C972 device generates TXD[3:0]
and TX_ER on TX_CLK rising edges. TX_EN is as-
serted with the first nibble of preamble and remains as-
serted throughout the duration of a packet until it is
deasserted prior to the first TX_CLK following the final
nibble of the frame. TX_EN transitions synchronous to
TX_CLK rising edges.
Note: The TX_EN pin is multiplexed with the TXEN
pin.
TX_ER
Transmit Error
TX_ER is an output that, if asserted while TX_EN is as-
serted, instructs the MII PHY device connected to the
Am79C972 device to transmit a code group error.
TX_ER is unused and is reserved for future use and will
always be driven to a logical zero.
Output
Output
Output
Input
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