82P2281PFG8 IDT, Integrated Device Technology Inc, 82P2281PFG8 Datasheet - Page 6

• Manufacturer Part Number: 82P2281PFG8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2281PFG8

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

IDT82P2281
5 PROGRAMMING INFORMATION .................................................................................................................................. 108
6 IEEE STD 1149.1 JTAG TEST ACCESS PORT ............................................................................................................ 347
7 PHYSICAL AND ELECTRICAL SPECIFICATIONS ...................................................................................................... 354
Table of Contents
4.1 POWER-ON SEQUENCE ............................................................................................................................................................................ 104
4.2 RESET ......................................................................................................................................................................................................... 104
4.3 RECEIVE / TRANSMIT PATH POWER DOWN .......................................................................................................................................... 104
4.4 MICROPROCESSOR INTERFACE ............................................................................................................................................................ 105
4.5 INDIRECT REGISTER ACCESS SCHEME ................................................................................................................................................ 107
5.1 REGISTER MAP .......................................................................................................................................................................................... 108
5.2 REGISTER DESCRIPTION ......................................................................................................................................................................... 121
6.1 JTAG INSTRUCTIONS AND INSTRUCTION REGISTER (IR) ................................................................................................................... 348
6.2 JTAG DATA REGISTER ............................................................................................................................................................................. 349
6.3 TEST ACCESS PORT CONTROLLER ....................................................................................................................................................... 351
7.1 ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................. 354
7.2 RECOMMENDED OPERATING CONDITIONS .......................................................................................................................................... 354
7.3 D.C. CHARACTERISTICS .......................................................................................................................................................................... 355
7.4 DIGITAL I/O TIMING CHARACTERISTICS ................................................................................................................................................ 356
7.5 CLOCK FREQUENCY REQUIREMENT ..................................................................................................................................................... 357
7.6 T1/J1 LINE RECEIVER ELECTRICAL CHARACTERISTICS .................................................................................................................... 358
7.7 E1 LINE RECEIVER ELECTRICAL CHARACTERISTICS ......................................................................................................................... 359
7.8 T1/J1 LINE TRANSMITTER ELECTRICAL CHARACTERISTICS ............................................................................................................. 360
7.9 E1 LINE TRANSMITTER ELECTRICAL CHARACTERISTICS ................................................................................................................. 361
7.10 JITTER TOLERANCE ................................................................................................................................................................................. 362
7.11 JITTER TRANSFER .................................................................................................................................................................................... 364
7.12 MICROPROCESSOR TIMING SPECIFICATION ........................................................................................................................................ 366
4.4.1
4.4.2
4.5.1
4.5.2
5.1.1
5.1.2
5.2.1
5.2.2
6.2.1
6.2.2
6.2.3
7.2.1
7.2.2
7.4.1
7.4.2
7.10.1 T1/J1 Mode .................................................................................................................................................................................... 362
7.10.2 E1 Mode ........................................................................................................................................................................................ 363
7.11.1 T1/J1 Mode .................................................................................................................................................................................... 364
7.11.2 E1 Mode ........................................................................................................................................................................................ 365
7.12.1 Motorola Non-Multiplexed Mode ................................................................................................................................................. 366
SPI Mode ....................................................................................................................................................................................... 105
Parallel Microprocessor Interface .............................................................................................................................................. 106
Indirect Register Read Access ................................................................................................................................................... 107
Indirect Register Write Access ................................................................................................................................................... 107
T1/J1 Mode .................................................................................................................................................................................... 108
5.1.1.1
5.1.1.2
E1 Mode ........................................................................................................................................................................................ 114
5.1.2.1
5.1.2.2
T1/J1 Mode .................................................................................................................................................................................... 122
5.2.1.1
5.2.1.2
E1 Mode ........................................................................................................................................................................................ 233
5.2.2.1
5.2.2.2
Device Identification Register (IDR) ........................................................................................................................................... 349
Bypass Register (BYP) ................................................................................................................................................................ 349
Boundary Scan Register (BSR) ................................................................................................................................................... 349
Recommended Operating Condition .......................................................................................................................................... 354
Operating Current Requirements ............................................................................................................................................... 354
In Non-Multiplexed Mode ............................................................................................................................................................. 356
In Multiplexed Mode ..................................................................................................................................................................... 357
Direct Register ................................................................................................................................................................ 108
Indirect Register ............................................................................................................................................................. 113
Direct Register ................................................................................................................................................................ 114
Indirect Register ............................................................................................................................................................. 119
Direct Register ................................................................................................................................................................ 122
Indirect Register ............................................................................................................................................................. 220
Direct Register ................................................................................................................................................................ 233
Indirect Register ............................................................................................................................................................. 332
6
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
August 20, 2009