C8051F340-GQR Silicon Laboratories Inc, C8051F340-GQR Datasheet - Page 153

• Manufacturer Part Number: C8051F340-GQR
• Description: MCU 8-Bit C8051F34x 8051 CISC 64KB Flash 3.3V/5V 48-Pin TQFP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F340-GQR

• Package: 48TQFP
• Device Core: 8051
• Family Name: C8051F34x
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 40
• Interface Type: I2C/SMBus/SPI/UART/USB
• On-chip Adc: 17-chx10-bit
• Number Of Timers: 4
• Ram Size: 4.25 KB
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

Bits7–0: P1SKIP[7:0]: Port1 Crossbar Skip Enable Bits.
Bits7–0: P2.[7:0]
Bits7-0:
P2.7
R/W
R/W
R/W
Bit7
Bit7
Bit7
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil-
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P1.n pin is not skipped by the Crossbar.
1: Corresponding P1.n pin is skipped by the Crossbar.
Write - Output appears on I/O pins per Crossbar Registers (when XBARE = ‘1’).
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P2MDIN. Directly reads Port
pin when configured as digital input.
0: P2.n pin is logic low.
1: P2.n pin is logic high.
Analog Input Configuration Bits for P2.7-P2.0 (respectively).
Port pins configured as analog inputs have their weak pull-up, digital driver, and digital
receiver disabled.
0: Corresponding P2.n pin is configured as an analog input.
1: Corresponding P2.n pin is not configured as an analog input.
P2.6
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 15.13. P2MDIN: Port2 Input Mode
SFR Definition 15.11. P1SKIP: Port1 Skip
P2.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
SFR Definition 15.12. P2: Port2 Latch
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
P2.4
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.3
P2.3
R/W
R/W
R/W
Bit3
Bit3
Bit3
P2.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
P2.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
(bit addressable)
P2.0
R/W
R/W
R/W
Bit0
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
00000000
Reset Value
Reset Value
Reset Value
11111111
11111111
0xD5
0xA0
0xF3
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