C8051F340-GQR Silicon Laboratories Inc, C8051F340-GQR Datasheet - Page 133

• Manufacturer Part Number: C8051F340-GQR
• Description: MCU 8-Bit C8051F34x 8051 CISC 64KB Flash 3.3V/5V 48-Pin TQFP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F340-GQR

• Package: 48TQFP
• Device Core: 8051
• Family Name: C8051F34x
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 40
• Interface Type: I2C/SMBus/SPI/UART/USB
• On-chip Adc: 17-chx10-bit
• Number Of Timers: 4
• Ram Size: 4.25 KB
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

14.2. Programmable Internal Low-Frequency (L-F) Oscillator
The C8051F340/1/2/3/4/5/8/9/C/D devices include a programmable internal oscillator which operates at a
nominal frequency of 80 kHz. The low-frequency oscillator circuit includes a divider that can be changed to
divide the clock by 1, 2, 4, or 8, using the OSCLD bits in the OSCLCN register (see SFR Definition 14.3).
Additionally, the OSCLF bits (OSCLCN5:2) can be used to adjust the oscillator’s output frequency.
14.2.1. Calibrating the Internal L-F Oscillator
Timers 2 and 3 include capture functions that can be used to capture the oscillator frequency, when run-
ning from a known time base. When either Timer 2 or Timer 3 is configured for L-F Oscillator Capture
Mode, a falling edge (Timer 2) or rising edge (Timer 3) of the low-frequency oscillator’s output will cause a
capture event on the corresponding timer. As a capture event occurs, the current timer value
(TMRnH:TMRnL) is copied into the timer reload registers (TMRnRLH:TMRnRLL). By recording the differ-
ence between two successive timer capture values, the low-frequency oscillator’s period can be calcu-
lated. The OSCLF bits can then be adjusted to produce the desired oscillator period.
Bits4–0: OSCCAL: Oscillator Calibration Value
Note: The contents of this register are undefined when Clock Recovery is enabled. See
“16.4. USB Clock Configuration” on page 166
R/W
Bit7
-
SFR Definition 14.2. OSCICL: Internal H-F Oscillator Calibration
These bits determine the internal H-F oscillator period. When set to 00000b, the oscillator
operates at its fastest setting. When set to 11111b, the oscillator operates at is slowest set-
ting. The contents of this register are factory calibrated to produce a 12 MHz internal oscilla-
tor frequency.
R/W
Bit6
-
R/W
Bit5
-
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
R/W
Bit4
Rev. 1.3
R/W
for details on Clock Recovery.
Bit3
OSCCAL
R/W
Bit2
R/W
Bit1
R/W
Bit0
SFR Address:
Reset Value
Variable
Section
0xB3
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