MT47H32M16HR-3 IT:F TR Micron Technology Inc, MT47H32M16HR-3 IT:F TR Datasheet - Page 95
![DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA T/R](/photos/31/34/313419/mfg557-84-fbga_sml.jpg)
MT47H32M16HR-3 IT:F TR
Manufacturer Part Number
MT47H32M16HR-3 IT:F TR
Description
DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA T/R
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Specifications of MT47H32M16HR-3 IT:F TR
Density
512 Mb
Maximum Clock Rate
667 MHz
Package
84FBGA
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Random Access Time
0.45 ns
Operating Temperature
-40 to 85 °C
Organization
32Mx16
Address Bus
15b
Access Time (max)
450ps
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
250mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
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Figure 49: READ-to-PRECHARGE – BL = 4
Figure 50: READ-to-PRECHARGE – BL = 8
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. Q 10/10 EN
Notes:
Notes:
not be issued until
the access of the last data elements.
Examples of READ-to-PRECHARGE for BL = 4 are shown in Figure 49 and in Figure 50
for BL = 8. The delay from READ-to-PRECHARGE period to the same bank is AL + BL/
2 - 2CK + MAX (
DQS, DQS#
DQS, DQS#
Command
Command
Address
Address
1. RL = 4 (AL = 1, CL = 3); BL = 4.
2.
3. Shown with nominal
1. RL = 4 (AL = 1, CL = 3); BL = 8.
2.
3. Shown with nominal
CK#
A10
DQ
CK#
A10
CK
DQ
CK
t
t
RTP ≥ 2 clocks.
RTP ≥ 2 clocks.
Bank a
Bank a
READ
READ
T0
T0
AL + BL/2 - 2CK + MAX ( t RTP/ t CK or 2CK)
AL = 1
AL = 1
First 4-bit
t
prefetch
RTP/
prefetch
NOP
AL + BL/2 - 2CK + MAX ( t RTP/ t CK or 2CK)
4-bit
T1
≥ t RAS (MIN)
NOP
T1
t
RP is met. However, part of the row precharge time is hidden during
t
CK or 2 × CK) where MAX means the larger of the two.
≥t RAS (MIN)
≥ t RTP (MIN)
NOP
T2
t
t
AC,
AC,
NOP
CL = 3
T2
Second 4-bit
95
t
t
DQSCK, and
DQSCK, and
CL = 3
prefetch
≥ t RC (MIN)
≥t RC (MIN)
NOP
T3
Bank a
Valid
PRE
T3
≥t RTP (MIN)
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
T4
t
DO
t
DQSQ.
DQSQ.
512Mb: x4, x8, x16 DDR2 SDRAM
NOP
T4
≥ t RP (MIN)
DO
DO
Bank a
Valid
PRE
T5
DO
DO
NOP
T5
Transitioning Data
Transitioning Data
DO
DO
NOP
T6
≥t RP (MIN)
DO
DO
Bank a
Valid
ACT
T6
DO
© 2004 Micron Technology, Inc. All rights reserved.
NOP
T7
DO
Don’t Care
Don’t Care
DO
NOP
T7
Bank a
Valid
ACT
T8
READ
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