MT47H32M16HR-3 IT:F TR Micron Technology Inc, MT47H32M16HR-3 IT:F TR Datasheet - Page 41
![DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA T/R](/photos/31/34/313419/mfg557-84-fbga_sml.jpg)
MT47H32M16HR-3 IT:F TR
Manufacturer Part Number
MT47H32M16HR-3 IT:F TR
Description
DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA T/R
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Specifications of MT47H32M16HR-3 IT:F TR
Density
512 Mb
Maximum Clock Rate
667 MHz
Package
84FBGA
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Random Access Time
0.45 ns
Operating Temperature
-40 to 85 °C
Organization
32Mx16
Address Bus
15b
Access Time (max)
450ps
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
250mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
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AC and DC Operating Conditions
Table 13: Recommended DC Operating Conditions (SSTL_18)
All voltages referenced to V
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. Q 10/10 EN
Parameter
Supply voltage
V
I/O supply voltage
I/O reference voltage
I/O termination voltage (system)
DDL
supply voltage
Notes:
SS
1. V
2. V
3. V
4. V
5. V
DC level of the same. Peak-to-peak noise (noncommon mode) on V
±1 percent of the DC value. Peak-to-peak AC noise on V
of V
resistors, is expected to be set equal to V
V
DD
SSQ
DDQ
REF
TT
REF
is not applied directly to the device. V
REF(DC)
.
and V
is expected to equal V
= V
tracks with V
SSL
. This measurement is to be taken at the nearest V
Symbol
DDQ
V
= V
V
V
REF(DC)
V
V
DDQ
DDL
DD
TT
must track each other. V
SS
.
DD
; V
0.49 × V
V
DDL
REF(DC)
41
Min
DDQ
1.7
1.7
1.7
tracks with V
/2 of the transmitting device and to track variations in the
- 40
DDQ
Micron Technology, Inc. reserves the right to change products or specifications without notice.
DDQ
0.50 × V
DD
512Mb: x4, x8, x16 DDR2 SDRAM
AC and DC Operating Conditions
REF
V
TT
Nom
.
REF(DC)
must be ≤ V
, and must track variations in the DC level of
1.8
1.8
1.8
is a system supply for signal termination
DDQ
DD
V
REF
0.51 × V
REF(DC)
.
may not exceed ±2 percent
Max
1.9
1.9
1.9
REF
© 2004 Micron Technology, Inc. All rights reserved.
bypass capacitor.
+ 40
DDQ
REF
may not exceed
Units
mV
V
V
V
V
Notes
1, 2
2, 3
2, 3
4
5
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