MT47H32M16HR-3 IT:F TR Micron Technology Inc, MT47H32M16HR-3 IT:F TR Datasheet - Page 47
![DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA T/R](/photos/31/34/313419/mfg557-84-fbga_sml.jpg)
MT47H32M16HR-3 IT:F TR
Manufacturer Part Number
MT47H32M16HR-3 IT:F TR
Description
DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA T/R
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Specifications of MT47H32M16HR-3 IT:F TR
Density
512 Mb
Maximum Clock Rate
667 MHz
Package
84FBGA
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Random Access Time
0.45 ns
Operating Temperature
-40 to 85 °C
Organization
32Mx16
Address Bus
15b
Access Time (max)
450ps
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
250mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
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Table 20: Output Characteristics
Figure 14: Output Slew Rate Load
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. Q 10/10 EN
Parameter
Output impedance
Pull-up and pull-down mismatch
Output slew rate
Notes:
Output
(V
OUT
1. Absolute specifications: 0°C ≤ T
2. Impedance measurement conditions for output source DC current: V
3. Mismatch is an absolute value between pull-up and pull-down; both are measured at
4. Output slew rate for falling and rising edges is measured between V
5. The absolute value of the slew rate as measured from V
6. IT and AT devices require an additional 0.4 V/ns in the MAX limit when T
V
V
rent: V
between 0V and 280mV.
the same temperature and voltage.
V
rate is measured between DQS - DQS# = –500mV and DQS# - DQS = +500mV. Output
slew rate is guaranteed by design but is not necessarily tested on each device.
or greater than the slew rate as measured from V
teed by design and characterization.
40°C and 0°C.
V
)
OUT
DDQ
TT
TT
Output Electrical Characteristics and Operating Conditions
+ 250mV for single-ended signals. For differential signals (DQS, DQS#), output slew
=
= 1420mV; (V
and V
V
DDQ
DDQ
25Ω
Reference
point
= 1.7V; V
DDQ
/2
- 280mV. The impedance measurement condition for output sink DC cur-
Min
See Output Driver Characteristics (page 48)
1.5
0
OUT
OUT
- V
= 280mV; V
DDQ
47
)/I
OH
C
≤ +85°C; V
must be less than 23.4Ω for values of V
OUT
Nom
Micron Technology, Inc. reserves the right to change products or specifications without notice.
–
–
/I
OL
512Mb: x4, x8, x16 DDR2 SDRAM
must be less than 23.4Ω for values of V
DDQ
= +1.8V ±0.1V, V
IL(AC)max
Max
IL(DC)max
4
5
to V
© 2004 Micron Technology, Inc. All rights reserved.
IH(AC)min
DD
to V
= +1.8V ±0.1V.
IH(DC)min
DDQ
TT
Units
. This is guaran-
V/ns
- 250mV and
Ω
Ω
= 1.7V;
C
OUT
is between –
is equal to
between
1, 4, 5, 6
Notes
1, 2, 3
1, 2
OUT
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