82V3280EQG Integrated Device Technology (Idt), 82V3280EQG Datasheet - Page 32
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82V3280EQG
Manufacturer Part Number
82V3280EQG
Description
WAN PLL 100-Pin TQFP Tray
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.IDT82V3280DQG8.pdf
(171 pages)
Specifications of 82V3280EQG
Package
100TQFP
Operating Temperature
-40 to 85 °C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
82V3280EQG
Manufacturer:
IDT
Quantity:
20 000
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Functional Description
IDT82V3280
Notes to
1. Reset.
2. An input clock is selected.
3. The T0 selected input clock is disqualified AND No qualified input clock is available.
4. The T0 selected input clock is switched to another one.
5. The T0 selected input clock is locked (the T0_DPLL_LOCK bit is ‘1’).
6. The T0 selected input clock is disqualified AND No qualified input clock is available.
7. The T0 selected input clock is unlocked (the T0_DPLL_LOCK bit is ‘0’).
8. The T0 selected input clock is locked again (the T0_DPLL_LOCK bit is ‘1’).
9. The T0 selected input clock is switched to another one.
10. The T0 selected input clock is locked (the T0_DPLL_LOCK bit is ‘1’).
11. The T0 selected input clock is disqualified AND No qualified input clock is available.
12. The T0 selected input clock is switched to another one.
13. The T0 selected input clock is disqualified AND No qualified input clock is available.
14. An input clock is selected.
15. The T0 selected input clock is switched to another one.
Figure
7:
Figure 7. T0 Selected Input Clock vs. DPLL Automatic Operating Mode
15
Pre-Locked2
mode
4
10
Pre-Locked
mode
9
12
1
3
5
8
Lost-Phase
32
Locked
mode
mode
Free-Run mode
2
7
13
11
6
14
Holdover
mode
December 9, 2008
WAN PLL
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