FDS6679 Fairchild Semiconductor, FDS6679 Datasheet - Page 2

• Manufacturer Part Number: FDS6679
• Description: MOSFET P-CH 30V 13A 8SOIC
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDS6679

• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 9 mOhm @ 13A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 13A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 100nC @ 10V
• Input Capacitance (ciss) @ Vds: 3939pF @ 15V
• Power - Max: 1W
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Transistor Polarity: P Channel
• Continuous Drain Current Id: 13A
• Drain Source Voltage Vds: -30V
• On Resistance Rds(on): 7.3mohm
• Rds(on) Test Voltage Vgs: -10V
• Threshold Voltage Vgs Typ: -1.6V
• Transistor Case Style: SOIC
• Rohs Compliant: Yes
• Dc: 04+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Notes:
1. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
Electrical Characteristics
Symbol
Off Characteristics
BV
∆BV
I
I
On Characteristics
V
∆V
R
I
g
Dynamic Characteristics
C
C
C
Switching Characteristics
t
t
t
t
Q
Q
Q
Drain–Source Diode Characteristics and Maximum Ratings
I
V
the drain pins. R
DSS
GSS
D(on)
d(on)
r
d(off)
f
S
FS
GS(th)
SD
θJA
∆T
∆T
DS(on)
iss
oss
rss
g
gs
gd
GS(th)
DSS
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
DSS
J
J
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
θJC
is guaranteed by design while R
a) 50°C/W (10 sec)
62.5°C/W steady state
when mounted on a
1in
copper
Parameter
2
pad of 2 oz
(Note 2)
(Note 2)
θCA
is determined by the user's board design.
V
I
V
V
V
I
V
V
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
T
D
D
A
GS
DS
GS
DS
GS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
= –250 µA, Referenced to 25°C
= –250 µA, Referenced to 25°C
= 25°C unless otherwise noted
=–10 V, I
b) 105°C/W when
= 0 V, I
= –24 V,
= ±25 V,
= V
= –10 V,
= –4.5 V,
= –10 V,
= –5 V,
= –15 V,
= –15 V,
= –10 V,
= –15 V,
= –10 V
= 0 V,
mounted on a .04 in
pad of 2 oz copper
Test Conditions
GS
, I
D
D
D
= –250 µA
I
= –250 µA
S
=–13 A, T
= –2.1 A
V
V
I
I
V
I
GS
D
D
V
I
I
R
D
DS
D
D
GS
DS
= –13 A
= –11 A
GEN
= –13 A,
= 0 V
= –13 A
= –1 A,
= 0 V
= 0 V,
2
= –5 V
= 6 Ω
J
=125°C
(Note 2)
Min
–30
–50
–1
c) 125°C/W when mounted on a
3939
Typ Max Units
–1.6
–0.7
–23
972
498
110
minimum pad.
7.3
9.5
10
44
19
10
65
71
12
15
5
±100
–2.1
–1.2
176
104
100
–1
–3
13
13
34
20
9
FDS6679 Rev C1 (W)
mV/°C
mV/°C
mΩ
nC
nC
nC
µA
nA
pF
pF
pF
ns
ns
ns
ns
V
V
A
S
A
V