FDN352AP Fairchild Semiconductor, FDN352AP Datasheet - Page 2

• Manufacturer Part Number: FDN352AP
• Description: MOSFET P-CH 30V 1.3A SSOT-3
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDN352AP

• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 180 mOhm @ 1.3A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 1.3A
• Vgs(th) (max) @ Id: 2.5V @ 250µA
• Gate Charge (qg) @ Vgs: 1.9nC @ 4.5V
• Input Capacitance (ciss) @ Vds: 150pF @ 15V
• Power - Max: 460mW
• Mounting Type: Surface Mount
• Package / Case: 3-SSOT, SuperSOT-3
• Configuration: Single
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 0.18 Ohm @ 10 V
• Forward Transconductance Gfs (max / Min): 2 S
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: +/- 25 V
• Continuous Drain Current: 1.3 A
• Power Dissipation: 500 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDN352AP

FDN352AP Rev. C1
Electrical Characteristics
Notes:
1. R
2. Pulse Test: Pulse Width < 300 µ s, Duty Cycle < 2.0%
Off Characteristics
BV
∆ BV
I
I
On Characteristics (Note 2)
V
∆ V
R
g
Dynamic Characteristics
C
C
C
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
Drain–Source Diode Characteristics and Maximum Ratings
I
V
t
Q
Symbol
DSS
GSS
d(on)
r
d(off)
f
S
rr
FS
GS(th)
SD
∆ T
∆ T
DS(on)
iss
oss
rss
surface of the drain pins R
(a) R
(b) R
g
gs
gd
rr
GS(th)
DSS
θ JA
DSS
J
J
θ JA
θ JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting
= 250°C/W when mounted on a 0.02 in
= 270°C/W when mounted on a 0.001 in
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
θ JC
Parameter
is guaranteed by design while R
T
A
2
= 25°C unless otherwise noted
2
pad of 2oz. copper.
pad of 2oz. copper.
θ JA
V
I
V
V
V
I
V
V
V
V
V
V
V
V
V
V
I
dI
is determined by the user’s board design.
D
D
F
GS
DS
GS
DS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
F
= –3.9 A,
= –250 µ A, Referenced to 25 ° C
= –250 µ A, Referenced to 25 ° C
/dt = 100 A/µs
= 0 V, I
= –24 V, V
= ± 25 V, V
= V
= –10 V, I
= –4.5 V, I
= –4.5 V, I
= –5 V, I
= –15 V, V
= –10 V, I
= –10 V, R
= –10V, I
= –4.5 V
= 0 V, I
2
GS
Test Conditions
, I
D
S
D
D
= –250 µ A
= –0.42 A
D
D
D
= –250 µ A
GS
DS
D
D
= –0.9 A
GS
GEN
= –0.9 A,
= –1.3 A
= –1 A,
= –1.1 A
= –1.1 A, T
= 0 V
= 0 V
= 0 V, f = 1.0 MHz
= 6 Ω
J
(Note 2)
= 125 ° C
Min
–0.8
–30
Typ
–2.0
–0.8
–17
150
250
330
150
2.0
1.4
0.5
0.5
40
20
15
10
17
4
4
1
7
–0.42
Max Units
± 100
–2.5
–1.2
180
300
400
1.9
www.fairchildsemi.com
–1
28
18
8
2
mV/ ° C
mV/ ° C
m Ω
nC
nC
nC
nC
µ A
nA
pF
pF
pF
ns
ns
ns
ns
ns
A
V
V
V
S