EP3C16F256I7 Altera, EP3C16F256I7 Datasheet - Page 193
EP3C16F256I7
Manufacturer Part Number
EP3C16F256I7
Description
Cyclone III
Manufacturer
Altera
Datasheet
1.EP3C16F256I7.pdf
(582 pages)
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Figure 8–1. Cyclone III I/O Banks
Notes to
(1)
(2)
(3)
(4)
Altera Corporation-Preliminary
March 2007
The PCI-X I/O standard does not meet the IV curve requirement at the linear region.
The RSDS, mini-LVDS, and PPDS I/O standards are only supported on output pins. These I/O standards are not
supported on input pins.
The LVPECL I/O standard is only supported on dedicated clock input pins. This I/O standard is not supported on
output pins.
The differential SSTL-2, SSTL-18, HSTL-18, HSTL-15, and HSTL-12 I/O standards are only supported on dedicated
clock input pins and PLL output clock pins.
Figure
8–1:
I/O Bank 8
I/O Bank 3
I/O banks 7 & 8 also support the
HSTL-12 Class II I/O standard
I/O banks 3 & 4 also support the
HSTL-12 Class II I/O standard
All I/O Banks Support:
3.3-V LVTTL/LVCMOS
3.0-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
1.2-V LVCMOS
3.0-V PCI/PCI-X (1)
LVDS
RSDS (2)
mini-LVDS (2)
PPDS (2)
LVPECL (3)
SSTL-2 class I and II
SSTL-18 CLass I and II
HSTL-18 Class I and II
HSTL-15 Class I and II
HSTL-12 Class I
Differential SSTL-2 (4)
Differenital SSTL-18 (4)
Differenital HSTL-18 (4)
DIfferential HSTL-15 (4)
Differential HSTL-12 (4)
I/O Bank 4
I/O Bank 7
Cyclone III Device Handbook, Volume 1
Cyclone III High-Speed I/O Banks
8–3
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