ADUC7032BSTZ-8L-RL Analog Devices Inc, ADUC7032BSTZ-8L-RL Datasheet - Page 28

IC,Battery Management,QFP,48PIN,PLASTIC

ADUC7032BSTZ-8L-RL

Manufacturer Part Number
ADUC7032BSTZ-8L-RL
Description
IC,Battery Management,QFP,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7032BSTZ-8L-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
ADuC7032-8L
Block 0, Flash/EE Memory Protection Registers
Name: FEE0HID and FEE0PRO
Address: 0xFFFF0E20 (for FEE0HID) and 0xFFFF0E1C (for FEE0PRO)
Default Value (Both Registers): 0xFFFFFFFF (for FEE0HID) and 0x00000000 (for FEE0PRO)
Access: Read/write
Function: These registers are written by user code to configure the protection of the Flash/EE memory.
Table 17. FEE0HID and FEE0PRO MMR Bit Designations
Bit
31
30
29
28 to 0
Block 1, Flash/EE Memory Protection Registers
Name: FEE1HID and FEE1PRO
Address: 0xFFFF0EA0 (for FEE1HID) and 0xFFFF0E9C (for FEE1PRO)
Default Value (Both Registers): 0xFFFFFFFF (for FEE1HID) and 0x00000000 (for FEE1PRO)
Access: Read/write
Function: These registers are written by user code to configure the protection of the Flash/EE memory.
Table 18. FEE1HID and FEE1PRO MMR Bit Designations
Bit
31
30
29 to 0
Description
Read Protection Bit.
Write-Protection Bit.
Write-Protection Bit.
Write-Protection Bits.
Description
Write-Protection Bit.
Write-Protection Bits.
Read-Protection Bit.
Cleared by the user to protect the 32 kB Flash/EE block code via JTAG read access.
Set by the user to allow reading of the 32 kB Flash/EE block code via JTAG read access.
Set by user code to unprotect Page 59.
Cleared by user code to write-protect Page 59.
Set by user code to unprotect Page 58.
Cleared by user code to write-protect Page 58.
When set by user code, these bits unprotect Page 0 to Page 57 of the 30 kB Flash/EE code memory. Each bit write-protects
two pages, and each page consists of 512 bytes.
When cleared by user code, these bits write-protect Page 0 to Page 57 of the 30 kB Flash/EE code memory. Each bit write-
protects two pages, and each page consists of 512 bytes.
Cleared by the user to protect the 64 kB Flash/EE block code via JTAG read access.
Set by the user to allow reading of the 64 kB Flash/EE block code via JTAG read access.
When set by user code, this bit protects Page 120 to Page 127 of the 64 kB Flash/EE code memory. This bit write-protects eight
pages, and each page consists of 512 bytes.
When cleared by user code, this bit write-protects Page 120 to Page 127 of the 64 kB Flash/EE code memory. This bit write-
protects eight pages, and each page consists of 512 bytes.
When set by user code, these bits unprotect Page 0 to Page 119 of the 64 kB Flash/EE code memory. Each bit write-protects
four pages, and each page consists of 512 bytes.
When cleared by user code, these bits write-protect Page 0 to Page 119 of the 64 kB Flash/EE code memory. Each bit write-
protects two pages, and each page consists of 512 bytes.
Rev.0 | Page 28 of 116

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