UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 512

8BIT MCU, 60K FLASH, 3KB RAM, LQFP

UPD78F0535GB(T)-UEU-A

Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0535GB(T)-UEU-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
interrupt servicing takes place. Before each interrupt request is acknowledged, the EI instruction must always be
issued to enable interrupt request acknowledgment.
than that of INTxx, and multiple interrupt servicing does not take place. The INTyy interrupt request is held pending,
and is acknowledged following execution of one main processing instruction.
512
Example 1. Multiple interrupt servicing occurs twice
During servicing of interrupt INTxx, two interrupt requests, INTyy and INTzz, are acknowledged, and multiple
Example 2. Multiple interrupt servicing does not occur due to priority control
Interrupt request INTyy issued during servicing of interrupt INTxx is not acknowledged because its priority is lower
PR = 0: Higher priority level
PR = 1: Lower priority level
IE = 0:
Interrupt request acknowledgment disabled
INTxx
(PR = 1)
Main processing
EI
Figure 19-10. Examples of Multiple Interrupt Servicing (1/2)
INTxx
(PR = 0)
1 instruction execution
Main processing
IE = 1
IE = 0
EI
CHAPTER 19 INTERRUPT FUNCTIONS
INTyy
(PR = 0)
INTxx servicing
User’s Manual U17260EJ6V0UD
RETI
EI
IE = 1
INTyy
(PR = 1)
IE = 0
IE = 1
INTxx servicing
IE = 0
IE = 1
IE = 0
RETI
INTzz
(PR = 0)
EI
INTyy servicing
RETI
EI
INTyy servicing
RETI
IE = 1
IE = 0
INTzz servicing
RETI

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