UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 138
UPD78F0535GB(T)-UEU-A
Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0535GB(T)-UEU-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
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Notes 1.
2.
The function of the ANI0/P20 to ANI7/P27 pins can be selected by using the A/D port configuration
register (ADPC), the analog input channel specification register (ADS), and PM2.
When using the P121 to P124 pins to connect a resonator for the main system clock (X1, X2) or
subsystem clock (XT1, XT2), or to input an external clock for the main system clock (EXCLK) or
subsystem clock (EXCLKS), the X1 oscillation mode, XT1 oscillation mode, or external clock input
mode must be set by using the clock operation mode select register (OSCCTL) (for details, see 6.3 (1)
Clock operation mode select register (OSCCTL) and (3) Setting of operation mode for
subsystem clock pin). The reset value of OSCCTL is 00H (all of the P121 to P124 are I/O port pins).
At this time, setting of PM121 to PM124 and P121 to P124 is not necessary.
Analog input selection
Digital I/O selection
ADPC
Table 5-6. Setting Functions of ANI0/P20 to ANI7/P27 Pins
Input mode
Output mode
Input mode
Output mode
CHAPTER 5 PORT FUNCTIONS
User’s Manual U17260EJ6V0UD
PM2
Selects ANI.
Does not select ANI.
Selects ANI.
Does not select ANI.
ADS
−
−
Analog input (to be converted)
Analog input (not to be converted)
Setting prohibited
Digital input
Digital output
ANI0/P20 to ANI7/P27 Pins
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