ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 83
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ML610Q428-NNNTBZ03A7
Manufacturer Part Number
ML610Q428-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q428-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
750
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
- ML610Q482P-NNNTB03A7 PDF datasheet
- ML610Q428-NNNTBZ03A7 PDF datasheet #2
- ML610Q428-NNNTBZ03A7 PDF datasheet #3
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- Download datasheet (3Mb)
A-2: When a subroutine is called by the program in executing an interrupt routine
A-2-1: When multiple interrupts are disabled
A-2-2: When multiple interrupts are enabled
• Processing immediately after the start of interrupt routine execution
• Processing at the end of interrupt routine execution
• Processing immediately after the start of interrupt routine execution
• Processing at the end of interrupt routine execution
Specify the “PUSH LR” instruction to save the subroutine return address in the stack.
Specify “POP LR” immediately before the RTI instruction to return from the interrupt processing after
returning the subroutine return address to LR.
Specify “PUSH LR, ELR, EPSW” to save the interrupt return address, the subroutine return address, and the
EPSW status in the stack.
Specify “POP PC, PSW, LR” instead of the RTI instruction to return the saved data of the interrupt return
address to PC, the saved data of EPSW to PSW, and the saved data of LR to LR.
Example of description: A-2-2
Intrpt_A-2-2;
PUSH ELR, EPSW,
LR
EI
BL Sub_1
POP PC, PSW, LR
:
:
:
:
; Start
; Save ELR, EPSW, LR at
; Enable interrupt
; Call subroutine Sub_1
; Return PC from the stack
; Return PSW from the stack
; Return LR from the stack
; End
the beginning
5 – 24
Sub_1;
DI
RT
ML610Q428/ML610Q429 User’s Manual
Chapter 5 Interrupts (INTs)
; Disable interrupt
; Return PC from LR
; End of subroutine
;
:
:
:
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