ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 81

no-image

ML610Q428-NNNTBZ03A7

Manufacturer Part Number
ML610Q428-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor

Specifications of ML610Q428-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
750
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
5.3.1
5.3.2
5.3.3
When an interrupt is generated with the MIE flag set to “1”, the following processing is executed by hardware and the
processing of program shifts to the interrupt destination.
When an interrupt is generated regardless of the state of MIE flag, the following processing is performed by hardware
and the processing of program shifts to the interrupt destination.
A software interrupt is generated as required within an application program. When the SWI instruction is performed
within the program, a software interrupt is generated, the following processing is performed by hardware, and the
processing program shifts to the interrupt destination. The vector table is specified by the SWI instruction.
Reference:
For the MIE flag, Program Counter (PC), CSR, PSW, and ELEVEL, see “nX-U8/100 Core Instruction Manual”.
(1) Transfer the program counter (PC) to ELR1.
(2) Transfer CSR to ECSR1.
(3) Transfer PSW toEPSW1.
(4) Set the MIE flag to “0”.
(5) Set the ELEVEL field to“1”.
(6) Load the interrupt start address into PC.
(1) Transfer PC to ELR2.
(2) Transfer CSR to ECSR2.
(3) Transfer PSW to EPSW2.
(4) Set the ELEVEL field to “2”.
(5) Load the interrupt start address into PC.
(1) Transfer PC to ELR1.
(2) Transfer CSR to ECSR1.
(3) Transfer PSW to EPSW1.
(4) Set the MIE flag to “0”.
(5) Set the ELEVEL field to “1”.
(6) Load the interrupt start address into PC.
Maskable Interrupt Processing
Non-Maskable Interrupt Processing
Software Interrupt Processing
5 – 22
ML610Q428/ML610Q429 User’s Manual
Chapter 5 Interrupts (INTs)

Related parts for ML610Q428-NNNTBZ03A7