ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 153

• Manufacturer Part Number: ML610Q428-NNNTBZ03A7
• Description: MCU 8BIT 48K FLASH 128-TQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q428-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 4.2MHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

After the PnRUN bit is set to “1”, counting starts in synchronization with the PWMn clock. This causes an error of up
to 1 clock pulse to the time the first PWMn interrupt is issued. The PWMn interrupt period from the second time is
fixed.
Figure 10-2 shows the operation timing of PWMn. (n = 0 to 2)
Note:
Even if “0” is written to the PnRUN bit, counting operation continues up to the falling edge (the PWMn status flag
(Pn0STAT) is in a “1” state) of the next PWMn clock pulse. Therefore, the PWMn interrupt (PWnINT) may occur.
PWMn* (negative logic)
PWMn* (Positive logic)
Write PWnCH
Write PWnCL
PWnDBUF
PWnPBUF
PWnCH/L
PWnCH/L
PWnDH/L
PWnPH/L
PnSTAT
PnSTAT
PWnINT
PnRUN
PnRUN
PnFLG
PnFLG
PnCK
PnCK
Figure 10-2 (1/2) Operation Timing Diagram of PWMn
Figure 10-2 (2/2) Operation Timing Diagram of PWMn
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2000 2001 2002 2003
0000
8000
A000
A000
8000
0001 0002
10 – 19
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T
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PWD
2004
7FFF 8000 8001
T
ML610Q428/ML610Q429 User’s Manual
PWP
BBBB
A000
7777
8000
2005
8002
2006
A000 A000 0000 0001
BBBB
7777
8000
A000
2007 2008
Chapter 10 PWM
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