ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 430
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ML610Q428-NNNTBZ03A7
Manufacturer Part Number
ML610Q428-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q428-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
750
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
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Chapter 6 Clock generation circuit
• Initial System clock
[ ] At power up or system reset, both built-in 500kHz RC oscillation and 32.768kHz crystal oscillation are oscillating, and
1/8 of the 500kHz RC oscillation clock(62.5kHz) is selected as a system clock for CPU.
• PLL oscillation clock
[ ] The PLL oscillation generates 8MHz clock which can be driven to an output pin, however the maximum CPU
operating frequency is 4MHz.
• Switching high-speed clock operation mode to low-speed clock operation mode
[
oscillating for sure by checking Q128H bit is “1”.
• Switching high-speed clock operation mode to another high-speed clock operation mode
[ ] When switching the high-speed clock mode, the clock must be first switched back to low clock before switching to
other high-speed clock (Refer to Section 6.2.2.).
• Port 2
[ ] Specify the 2
[ ] A high-speed crystal/ceramic oscillation or an external clock input mode does not require specifying the 2
for the port 1(Refer to Section 19.3.2.)
Chapter 7 TBC (Time Base Counter)
• HTBCLK
[ ] HTBLK goes through the HTBDR register. Set proper valute to the register(Refer to Section 7.2.3. in the user’s
manual).
• How to read LTBC
[ ] Read consecutively LTBC(Low-speed Time Base Counter) twice until the last data coincides the previous data to
prevent reading of uncertain data while counting up the clock (Refer to Section 7.3.1 in the user’s manual).
Chapter 9 Timer
• How to read the timer counter registers
[ ] Check notes for reading the timer counter registers while counting up(Refer to Section 9.2.6. ~ 9.2.9. in the user’s
manual).
Chapter 10 PWM
• Used Pin
[ ] P34(PWM0) pin or P43(PWM0) pin is used.
[ ] P35(PWM1) pin or P47(PWM1) pin is used.
[ ] P20(PWM2) pin or P30(PWM2) pin is used.
• How to read the PWM counter registers
[ ] Check notes for reading the PWM counter registers while the PWM is operating(Refer to Section 10.2.4. in the user’s
manual).
• Port 2
[ ] Specify the 2
Chapter 11 WDT
• Overflow period
Clear WDT during the selected overflow period:
[ ] 125ms,
• WDP
[ ] Check the WDP before writing to the WDTCON and determine writing “5AH” or “0A5H” (Refer to Section 11.2.2. in
the user’s manual).
] When switching the high-speed clock to the low-speed clock after the power up, confirm the low-speed clock is
nd
nd
Function
Function
[ ] 500ms,
nd
nd
function for the port 2 when driving a clock to the pin(Refer to Section 6.4 in the user’s manual).
Function for the port(Refer to Section 10.4 in the user’s manual).
[ ] 2s,
[ ] 8s
E – 2
ML610Q428/ML610Q429 User’s Manual
Appendix E Check List
nd
function
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