ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 119
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ML610Q428-NNNTBZ03A7
Manufacturer Part Number
ML610Q428-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q428-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
750
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
- ML610Q482P-NNNTB03A7 PDF datasheet
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8.3
undefined data during counting.
Figure 10-2 shows an example of the program for reading T1KCL and T1LCRH.
By setting the T1KRUN bit of the 1kHz timer control register (T1KCON) to “1”, the 1kHz timer starts counting of the
1kHz timer counter registers L or H (T1KCRL, T1KCRH).
By dividing the T2KHz signal frequency (2.048kHz) of the low-speed timer base counter (LTBC) by the binary/ternary
counter, the timer generates a 1kHz signal. Based on the 1kHz signal, a 1kHz timer interrupt request signal (T1KINT)
is generated by the decimal counters of T1KCRL and T1KCRH. The period of the 1kHz timer interrupt can be selected
between the 10Hz interrupt or 1Hz interrupt using the T1KSEL bit of T1KCON.
When write operation is performed for T1KCRL or T1KCRH, the value of the binary/ternary counter and the value of
T1KCRL or T1KCRH is cleared to “0”.
Data can be read from T1KCRL and T1KCRH. When reading data from T1KCRL or T1KCRH in the 1kHz timer
operation start state, read T1KCRL or T1KCRH twice and check that the values match to prevent the reading of
MARK:
;
;
Description of Operation
LEA offset T1KCRL ; EA←T1KCRL address
L ER0, [EA]
L ER2, [EA]
CMP ER0, ER1
BNE MARK
Figure 8-2 Example of Program for Reading T1KCRL and T1KCRH
:
; First read
; Second read
; Comparison of T1KCRL and T1CKRH
; To MARK when not matched.
8 – 5
ML610Q428/ML610Q429 User’s Manual
Chapter 8 1 kHz Timer (1kHzTM)
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