ML610Q428-NNNTBZ03A7 Rohm Semiconductor, ML610Q428-NNNTBZ03A7 Datasheet - Page 249
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ML610Q428-NNNTBZ03A7
Manufacturer Part Number
ML610Q428-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q428-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
750
Company:
Part Number:
ML610Q428-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
- ML610Q482P-NNNTB03A7 PDF datasheet
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- ML610Q428-NNNTBZ03A7 PDF datasheet #3
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18.3 Description of Operation
18.3.1
18.3.2
For each pin of Port 2, any one of high-impedance output mode, P-channel open drain output mode, N-channel open
drain output mode, and CMOS output mode can be selected by setting the Port 2 control registers 0 and 1 (P2CON0
and P2CON1). At a system reset, high-impedance output mode is selected as the initial state.
Depending of the value set in the Port 2 data register (P2D), a “L” level or “H” level signal is output to each pin of Port
2.
Low-speed clock (LSCLK) output, High-speed output clock (OUTCLK) output, melody 0 (MD0) output, or PWM2
(PWM2) output is assigned to Port 2 as a secondary and tertiary function. These pins can be used in a secondary or
tertiary function mode by setting the P22MD to P20MD bits and the P22MD1 to P20MD1 bits of the Port 2 mode
registers (P2MOD, P2MOD1).
The frequency of a low-speed clock (LSCLK) output can be set up by the OCK0 bit and the OCK1 bit of the Port2
mode register 2 (P2MOD2).
Output Port Function
Secondary and Tertiary Function
18 – 8
ML610Q428/ML610Q429 User’s Manual
Chapter 18 Port 2
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