LFEC3E-5TN144C Lattice, LFEC3E-5TN144C Datasheet - Page 160

• Manufacturer Part Number: LFEC3E-5TN144C
• Description: FPGA - Field Programmable Gate Array 3.1K LUTs Pb-Free
• Manufacturer: Lattice

Specifications of LFEC3E-5TN144C

• Number Of Logic Blocks: 384
• Number Of Macrocells: 3100
• Number Of Programmable I/os: 97
• Data Ram Size: 56320
• Delay Time: 5 ns
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 3100
• Package / Case: TQFP-144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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November 2007
For Further Information
A variety of technical notes for the LatticeECP/EC family are available on the Lattice web site at www.latticesemi.com.
For further information about interface standards refer to the following web sites:
• LatticeECP/EC sysIO Usage Guide (TN1056)
• LatticeECP/EC sysCLOCK PLL Design and Usage Guide (TN1049)
• Memory Usage Guide for LatticeECP/EC Devices (TN1051)
• LatticeECP/EC DDR Usage Guide (TN1050)
• Power Estimation and Management for LatticeECP/EC and LatticeXP Devices (TN1052)
• LatticeECP-DSP sysDSP Usage Guide (TN1057)
• LatticeECP/EC sysCONFIG Usage Guide (TN1053)
• IEEE 1149.1 Boundary Scan Testability in Lattice Devices
• JEDEC Standards (LVTTL, LVCMOS, SSTL, HSTL): www.jedec.org
• PCI: ww.pcisig.com
LatticeECP/EC Family Data Sheet
6-1
Supplemental Information
Further Info_01.3
Data Sheet